coreboot-kgpe-d16/src/include/cpu
Kyösti Mälkki d7542cb338 arch/x86: Ensure LAPIC mode for exception handler
Attempting to use X2APIC MSRs before the call to enable_lapic()
is made raises exception and double-faults.

Change-Id: Ib97889466af0fbe639bec2be730784acc015b525
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76194
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-07-05 15:59:31 +00:00
..
amd soc/amd/common/block/cpu/noncar: add get_usable_physical_address_bits() 2023-06-07 00:05:30 +00:00
intel soc/intel/meteorlake: Add QS(C0) stepping CPU ID 2023-06-29 17:08:17 +00:00
power src/cpu/power9: move part of scom.h to scom.c 2023-04-18 13:05:56 +00:00
x86 arch/x86: Ensure LAPIC mode for exception handler 2023-07-05 15:59:31 +00:00
cpu.h cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_path 2023-04-06 15:13:28 +00:00