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If device is supported as a wake source, _S0W should be set to D3hot. This ensures that the device is put into D3hot by the OSPM. Power resource(PRIC) for the device is listed in both _PR0 and _PR3. Thus, it ensures that the OSPM does not turn off power resource when device is put into D0 and D3hot. Hence, it is capable of waking the system from D3hot state. However, if it is put into D3cold, then the power resource is turned off by the OSPM. The devices we are currently looking at for touchscreen/touchpad do not really support auxiliary power and so do not support wake from D3cold. BUG=b:186070097 TEST=build and check device wake state _S0W set to 3 in ssdt table. Change-Id: I34e4b2350875530d3337be700276bcc4fb1f810a Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52847 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> |
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| .. | ||
| Intel | ||
| RFC | ||
| _static | ||
| acpi | ||
| arch | ||
| cbfstool | ||
| community | ||
| contributing | ||
| doxygen | ||
| drivers | ||
| flash_tutorial | ||
| getting_started | ||
| gfx | ||
| ifdtool | ||
| infrastructure | ||
| lib | ||
| mainboard | ||
| northbridge | ||
| releases | ||
| security | ||
| soc | ||
| superio | ||
| technotes | ||
| tutorial | ||
| vendorcode | ||
| .gitignore | ||
| AMD-S3.txt | ||
| COPYING | ||
| Doxyfile.coreboot | ||
| Doxyfile.coreboot_simple | ||
| Makefile | ||
| Makefile.sphinx | ||
| POSTCODES | ||
| beginverbatim.tex | ||
| cbfs.txt | ||
| codeflow.svg | ||
| conf.py | ||
| corebootBuildingGuide.tex | ||
| coreboot_logo.png | ||
| distributions.md | ||
| endverbatim.tex | ||
| gcov.txt | ||
| hypertransport.svg | ||
| index.md | ||
| mainboard_io_trap_handler_sample.c | ||
| payloads.md | ||
| util.md | ||
