Duncan Laurie 8dddc30eb5 haswell: Add microcode for ULT C0 stepping 0x40651 ... Change-Id: I53982d88f94255abdbb38ca18f9d891d4bc161b0 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/2858 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>		2013-03-22 00:17:00 +01:00
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amd	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	2013-03-01 10:16:08 +01:00
armltd	ARMV7: minor tweaks to inter-stage calling and payload handling.	2013-02-20 20:49:16 +01:00
intel	haswell: Add microcode for ULT C0 stepping 0x40651	2013-03-22 00:17:00 +01:00
samsung	armv7/exynos/snow: new cache maintenance API	2013-03-19 22:23:45 +01:00
via	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	2013-03-01 10:16:08 +01:00
x86	x86: Unify arch/io.h and arch/romcc_io.h	2013-03-22 00:00:09 +01:00
Kconfig	Fix microcode selection code	2013-02-27 21:01:53 +01:00
Makefile.inc	Fix microcode selection code	2013-02-27 21:01:53 +01:00