c914053026
standard BIOSes RRLX0013 and SRLX0013. Specifically move SPI and PME I/Os to 0x1228 and 0x298 and switch SIO watchdog to ext. 48 MHz CLKIN. Signed-off-by: Jens Rottmann <JRottmann@LiPPERTEmbedded.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5775 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 |
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.. | ||
chip.h | ||
devicetree.cb | ||
irq_tables.c | ||
Kconfig | ||
mainboard.c | ||
romstage.c |