5ae96aa171
Move PSP_SHAREDMEM_DRAM_END after _etransfer_buffer to ensure that the transfer buffer actually lives within the 32KiB that is supported to be transferred. Resulting symbol address change in bootblock.debug file summarized below. BEFORE: 02011000 T _psp_sharedmem_dram 02011000 T _transfer_buffer 02011000 T _transfer_info 02011040 T _etransfer_info 02011040 T _vboot2_work 02014040 T _evboot2_work 02019000 T _epsp_sharedmem_dram 02019000 T _preram_cbmem_console 0201a600 T _epreram_cbmem_console 0201a600 T _timestamp 0201a800 T _etimestamp 0201a800 T _fmap_cache 0201ac52 T _efmap_cache 0201ac52 T _etransfer_buffer AFTER: 02011000 T _psp_sharedmem_dram 02011000 T _transfer_buffer 02011000 T _transfer_info 02011040 T _etransfer_info 02011040 T _vboot2_work 02014040 T _evboot2_work 02014040 T _preram_cbmem_console 02015640 T _epreram_cbmem_console 02015640 T _timestamp 02015840 T _etimestamp 02015840 T _fmap_cache 02015c92 T _efmap_cache 02015c92 T _etransfer_buffer 02019000 T _epsp_sharedmem_dram BUG=b:167243965 BRANCH=None TEST=checked 'cbmem -1' for FMAP error after ec reboot Signed-off-by: Josie Nordrum <josienordrum@google.com> Change-Id: I9b482aced5deb40bd87d19d9c42585d8a6db5fc0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45045 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
108 lines
5.2 KiB
Text
108 lines
5.2 KiB
Text
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <memlayout.h>
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#include <arch/header.ld>
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#include <soc/psp_transfer.h>
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#define EARLY_RESERVED_DRAM_START(addr) SYMBOL(early_reserved_dram, addr)
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#define EARLY_RESERVED_DRAM_END(addr) SYMBOL(eearly_reserved_dram, addr)
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#define PSP_SHAREDMEM_DRAM_START(addr) SYMBOL(psp_sharedmem_dram, addr)
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#define PSP_SHAREDMEM_DRAM_END(addr) SYMBOL(epsp_sharedmem_dram, addr)
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/*
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*
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* +--------------------------------+
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* | |
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* | |
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* | |
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* | |
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* | |
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* | |
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* | |
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* reserved_dram_end +--------------------------------+
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* | |
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* | verstage (if reqd) |
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* | (VERSTAGE_SIZE) |
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* +--------------------------------+ VERSTAGE_ADDR
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* | |
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* | FSP-M |
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* | (FSP_M_SIZE) |
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* +--------------------------------+ FSP_M_ADDR
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* | |X86_RESET_VECTOR = ROMSTAGE_ADDR + ROMSTAGE_SIZE - 0x10
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* | romstage |
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* | (ROMSTAGE_SIZE) |
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* +--------------------------------+ ROMSTAGE_ADDR
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* | bootblock |
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* | (C_ENV_BOOTBLOCK_SIZE) |
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* +--------------------------------+ BOOTBLOCK_ADDR
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* | Unused hole |
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* +--------------------------------+
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* | FMAP cache (FMAP_SIZE) |
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* +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40 + VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE + PRERAM_CBMEM_CONSOLE_SIZE + 0x200
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* | Early Timestamp region (512B) |
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* +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40 + VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE + PRERAM_CBMEM_CONSOLE_SIZE
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* | Preram CBMEM console |
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* | (PRERAM_CBMEM_CONSOLE_SIZE) |
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* +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40 + VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE
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* | PSP shared (vboot workbuf) |
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* |(VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE) |
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* +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40
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* | Transfer Info Structure |
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* +--------------------------------+ PSP_SHAREDMEM_BASE
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* | APOB (64KiB) |
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* +--------------------------------+ PSP_APOB_DRAM_ADDRESS
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* | Early BSP stack |
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* | (EARLYRAM_BSP_STACK_SIZE) |
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* reserved_dram_start +--------------------------------+ EARLY_RESERVED_DRAM_BASE
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* | DRAM |
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* +--------------------------------+ 0x100000
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* | Option ROM |
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* +--------------------------------+ 0xc0000
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* | Legacy VGA |
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* +--------------------------------+ 0xa0000
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* | DRAM |
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* +--------------------------------+ 0x0
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*/
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SECTIONS
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{
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DRAM_START(0x0)
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EARLY_RESERVED_DRAM_START(CONFIG_EARLY_RESERVED_DRAM_BASE)
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EARLYRAM_STACK(., CONFIG_EARLYRAM_BSP_STACK_SIZE)
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REGION(apob, CONFIG_PSP_APOB_DRAM_ADDRESS, 64K, 1)
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#if CONFIG(VBOOT)
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PSP_SHAREDMEM_DRAM_START(CONFIG_PSP_SHAREDMEM_BASE)
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_transfer_buffer = .;
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REGION(transfer_info, ., TRANSFER_INFO_SIZE, 4)
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VBOOT2_WORK(., VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE)
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#endif
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PRERAM_CBMEM_CONSOLE(., CONFIG_PRERAM_CBMEM_CONSOLE_SIZE)
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TIMESTAMP(., TIMESTAMP_BUFFER_SIZE)
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FMAP_CACHE(., FMAP_SIZE)
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#if CONFIG(VBOOT)
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_etransfer_buffer = .;
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PSP_SHAREDMEM_DRAM_END(CONFIG_PSP_SHAREDMEM_BASE + CONFIG_PSP_SHAREDMEM_SIZE)
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#endif
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_ = ASSERT((CONFIG_BOOTBLOCK_ADDR + CONFIG_C_ENV_BOOTBLOCK_SIZE - 0x10) == CONFIG_X86_RESET_VECTOR, "Reset vector should be -0x10 from end of bootblock");
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_ = ASSERT(CONFIG_BOOTBLOCK_ADDR == ((CONFIG_BOOTBLOCK_ADDR + 0xFFFF) & 0xFFFF0000), "Bootblock must be 16 bit aligned");
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BOOTBLOCK(CONFIG_BOOTBLOCK_ADDR, CONFIG_C_ENV_BOOTBLOCK_SIZE)
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ROMSTAGE(CONFIG_ROMSTAGE_ADDR, CONFIG_ROMSTAGE_SIZE)
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REGION(fspm, CONFIG_FSP_M_ADDR, CONFIG_FSP_M_SIZE, 1)
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#if CONFIG(VBOOT_SEPARATE_VERSTAGE)
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VERSTAGE(CONFIG_VERSTAGE_ADDR, CONFIG_VERSTAGE_SIZE)
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#endif
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EARLY_RESERVED_DRAM_END(.)
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RAMSTAGE(CONFIG_RAMBASE, 8M)
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}
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#if ENV_BOOTBLOCK
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/* Bootblock specific scripts which provide more SECTION directives. */
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#include <cpu/x86/16bit/entry16.ld>
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#include <cpu/x86/16bit/reset16.ld>
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#endif /* ENV_BOOTBLOCK */
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