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Felix Held c99bd4a6c9 util/cbfstool/fmd: make flashmap_flags bitfield struct elements unsigned
One bit wide bitfields should always be unsigned, since they can only be
either 0 or -1, but never 1 which is assigned to that bit field in some
cases. Making this unsigned allows it to have the values 0 or 1 which is
what we want there.

BUG=b:157068645
BRANCH=zork

Change-Id: I99c236df583528848b455ef424504e6c2a33c5d6
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45593
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-09-23 13:39:14 +00:00
3rdparty Update amd_blobs submodule to upstream master 2020-09-17 19:46:18 +00:00
Documentation Documentation: Add ASan documentation 2020-09-21 07:45:37 +00:00
LICENSES drivers: Use SPDX identifiers 2020-05-25 22:19:21 +00:00
configs configs: Build test experimental x86_64 code 2020-08-19 10:54:45 +00:00
payloads treewide/Kconfig: Drop unneeded empty lines 2020-09-21 16:30:14 +00:00
src lib/Makefile.inc: drop redundant conditional on CONFIG_HAVE_SPD_IN_CBFS 2020-09-23 11:11:20 +00:00
tests device/dram: Add method for converting MHz to MT/s 2020-09-16 03:24:50 +00:00
util util/cbfstool/fmd: make flashmap_flags bitfield struct elements unsigned 2020-09-23 13:39:14 +00:00
.checkpatch.conf
.clang-format
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.gitignore util: update .gitignore to ignore spd_tools binaries 2020-09-02 07:17:55 +00:00
.gitmodules 3rdparty: Add submodule intel-sec-tools 2020-09-09 13:08:25 +00:00
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README.md
gnat.adc
toolchain.inc

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.