85 lines
2.4 KiB
C
85 lines
2.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2013 Google Inc.
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* Copyright (C) 2015 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef ONBOARD_H
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#define ONBOARD_H
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#include "irqroute.h"
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/*
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* Calculation of gpio based irq.
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* Gpio banks ordering : GPSW, GPNC, GPEC, GPSE
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* Max direct irq (MAX_DIRECT_IRQ) is 114.
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* Size of gpio banks are
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* GPSW_SIZE = 98
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* GPNC_SIZE = 73
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* GPEC_SIZE = 27
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* GPSE_SIZE = 86
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*/
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/*
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* gpio based irq for kbd, 17th index in North Bank
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* MAX_DIRECT_IRQ + GPSW_SIZE + 18
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*/
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/* ToDO: change kbd irq to gpio bank index */
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#define BOARD_I8042_IRQ 182
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/* SCI: Gpio index in N bank */
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#define BOARD_SCI_GPIO_INDEX 15
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/* Trackpad: Gpio index in N bank */
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#define BOARD_TRACKPAD_GPIO_INDEX 18
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/* Touch: Gpio index in SW bank */
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#define BOARD_TOUCH_GPIO_INDEX 76
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/* EVT Touch: Gpio index in N bank */
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#define BOARD_EVT_TOUCH_GPIO_INDEX 19
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/* TI Audio: Gpio index in SW bank */
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#define BOARD_JACK_TI_GPIO_INDEX 34
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/* MAXIM Audio: Gpio index in SE bank */
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#define BOARD_JACK_MAXIM_GPIO_INDEX 77
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#define BOARD_TRACKPAD_NAME "trackpad"
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#define BOARD_TRACKPAD_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(1)
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#define BOARD_TRACKPAD_I2C_BUS 5
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#define BOARD_TRACKPAD_I2C_ADDR 0x15
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#define BOARD_TOUCHSCREEN_NAME "touchscreen"
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#define BOARD_TOUCHSCREEN_WAKE_GPIO ACPI_ENABLE_WAKE_SUS_GPIO(2)
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#define BOARD_TOUCHSCREEN_I2C_BUS 0
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#define BOARD_TOUCHSCREEN_I2C_ADDR 0x4a /* TODO(shawnn): Check this */
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/* SD CARD gpio */
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#define SDCARD_CD 81
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#define AUDIO_CODEC_HID "193C9890"
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#define AUDIO_CODEC_CID "193C9890"
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#define AUDIO_CODEC_DDN "Maxim 98090 Codec "
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#define AUDIO_CODEC_I2C_ADDR 0x10
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#define TI_SWITCH_HID "104C227E"
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#define TI_SWITCH_CID "104C227E"
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#define TI_SWITCH_DDN "TI SWITCH "
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#define TI_SWITCH_I2C_ADDR 0x3B
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#define BOARD_PRE_EVT 0x01
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#define BOARD_EVT 0x02
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#endif
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#define DPTF_CPU_PASSIVE 88
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#define DPTF_CPU_CRITICAL 90
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