coreboot-kgpe-d16/src/mainboard/google/guado
Aaron Durbin 30b0c7adf0 mainboards: align on using ACPI_Sx definitions
The mainboard_smi_sleep() function takes ACPI sleep values
of the form S3=3, S4=4, S5=5, etc. All the chipsets ensure
that whatever hardware PM1 control register values are used
the interface to the mainboard is the same. Move all the
SMI handlers in the mainboard directory to not open code
the literal values 3 and 5 for ACPI_S3 and ACPI_S5.

There were a few notable exceptions where the code was
attempting to use the hardware values and not the common
translated values. The few users of SLEEP_STATE_X were
updated to align with ACPI_SX as those defines are
already equal. The removal of SLEEP_STATE_X defines is
forthcoming in a subsequent patch.

BUG=chrome-os-partner:54977

Change-Id: I76592c9107778cce5995e5af764760453f54dc50
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15664
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-07-15 08:30:31 +02:00
..
acpi
spd mb/google: remove superfluous header includes in bdw chromeboxes 2016-06-21 00:44:58 +02:00
Kconfig chromebooks: Define GBB hardware IDs 2016-02-12 18:09:22 +01:00
Kconfig.name
Makefile.inc
acpi_tables.c
board_info.txt
chromeos.c chromeos: Simplify fill_lb_gpios even further 2016-04-05 00:50:56 +02:00
chromeos.fmd chromeos.fmd: Mark RW_LEGACY as CBFS 2016-04-05 13:37:31 +02:00
cmos.layout
devicetree.cb mb/google: Remove whitespace from devicetree on bdw boxes. 2016-06-16 06:46:13 +02:00
dsdt.asl
fadt.c
gpio.h
hda_verb.c
lan.c
mainboard.c mb/google: remove superfluous header includes in bdw chromeboxes 2016-06-21 00:44:58 +02:00
onboard.h
pei_data.c
romstage.c
smihandler.c mainboards: align on using ACPI_Sx definitions 2016-07-15 08:30:31 +02:00
thermal.h