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Duncan Laurie cae7944fc3 mb/google/sarien: Enable recovery mode GPIO
Enable the active-low recovery mode GPIO now that new boards are
available which have an external pull-up instead of a pull-down so
it can be asserted properly by servo.

This was tested on a Sarien system by holding the recovery button
on the servo board and tapping the cold reset button and ensuring
that it enters recovery mode.

Change-Id: I3216580bc94de71b05bf9382f15d0c4d428cb9fa
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/30721
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
2019-01-08 19:13:03 +00:00
3rdparty 3rdparty/libgfxinit: Update submodule pointer 2018-12-21 18:12:36 +00:00
Documentation Documentation/releases: Note the disappearance of device_t 2019-01-08 12:32:32 +00:00
configs soc/intel/apollolake: Add reset code to postcar stage 2018-10-23 07:11:31 +00:00
payloads Fix typos involving "the the" 2018-12-18 13:24:28 +00:00
src mb/google/sarien: Enable recovery mode GPIO 2019-01-08 19:13:03 +00:00
util crossgcc: Update Python to version 3.7.2 2019-01-07 10:33:37 +00:00
.checkpatch.conf .checkpatch.conf: Ignore a few more warnings 2018-08-13 12:23:24 +00:00
.clang-format
.gitignore util/bucts: Add tool to manipulate BUC.TS bit on Intel targets 2018-11-19 08:19:16 +00:00
.gitmodules submodules: add FSP mirror as non-default submodule 2018-09-02 03:07:50 +00:00
.gitreview
COPYING
MAINTAINERS mainboard: Add Supermicro X10SLM+-F 2018-12-29 18:26:46 +00:00
Makefile Makefile.inc: Avoid race condition when using 'make -j<N>' 2018-12-11 16:19:15 +00:00
Makefile.inc util/gitconfig/pre-commit: Use clang-format to sanitise commits 2019-01-04 10:37:10 +00:00
README.md README: Convert to Markdown 2018-09-16 13:01:58 +00:00
gnat.adc
toolchain.inc arch/power8: Rename to ppc64 2018-11-30 20:02:17 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.