cb8eab482f
add support for NSC pc87351 SuperIO add Bitworks/IMS manboard config This is a very basic framework for the i440bx chipset and the Bitworks IMS board that uses it. Most things are structure only. Known issues: - SMbus reads to the RAM SPD come back all zero. - dump_spd_registers() is commented out since it breaks with the default setting of generic_dump_spd.c where it wants 2 memory controllers. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2347 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
29 lines
802 B
Text
29 lines
802 B
Text
# Config file for the Bitworks ims board
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# This will make a target directory of ./ims
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target ims
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mainboard bitworks/ims
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option ROM_SIZE=524288
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romimage "normal"
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option USE_FALLBACK_IMAGE=0
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option ROM_IMAGE_SIZE=0x10000
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option LINUXBIOS_EXTRA_VERSION=".0Normal"
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# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
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# payload ../../../../tg3--ide_disk.zelf
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# payload ../../../../../lnxieepro100.ebi
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payload /etc/hosts
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end
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romimage "fallback"
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option USE_FALLBACK_IMAGE=1
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option ROM_IMAGE_SIZE=0x10000
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option LINUXBIOS_EXTRA_VERSION=".0Fallback"
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# payload /usr/share/etherboot/5.1.9pre2-lnxi-lb/tg3--ide_disk.zelf
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# payload ../../../../tg3--ide_disk.zelf
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# payload ../../../../../lnxieepro100.ebia
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payload /etc/hosts
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end
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buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"
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