a19b07fec1
* Add architecture independend way of clearing all DRAM * Implemented in ramstage as MTRRs need to be set to speed up clearing. Takes up to 15 seconds per GiB otherwise. * Use memset_pae on x86 * Add quirks for FSP1.0 Tested on P8H61M-Pro: * Clears 4GiB in less than 1 second Tested on wedge100s: * Clears 8GiB in 2 seconds Change-Id: Idaadb8fb438e5b95557c0f65a14534e8762fde20 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31550 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
5 lines
226 B
Makefile
5 lines
226 B
Makefile
romstage-$(CONFIG_PLATFORM_HAS_DRAM_CLEAR) += memory.c
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postcar-$(CONFIG_PLATFORM_HAS_DRAM_CLEAR) += memory.c
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ramstage-$(CONFIG_PLATFORM_HAS_DRAM_CLEAR) += memory.c
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ramstage-$(CONFIG_PLATFORM_HAS_DRAM_CLEAR) += memory_clear.c
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