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Stefan Reinauer cc5b344662 Project PIANO aka tianocoreboot
This is a Tiano Core loader payload based on libpayload.  It
will load a Tiano Core DXE core from an UEFI firmware volume
stored in CBFS.

Currently Tiano Core dies because it does not find all the UEFI services it needs:

coreboot-4.0-3316-gc5c9ff8-dirty Mon Jan 28 15:37:12 PST 2013 starting...
[..]
Tiano Core Loader v1.0
Copyright (C) 2013 Google Inc. All rights reserved.

Memory Map (5 entries):
  1. 0000000000000000 - 0000000000000fff [10]
  2. 0000000000001000 - 000000000009ffff [01]
  3. 00000000000c0000 - 0000000003ebffff [01]
  4. 0000000003ec0000 - 0000000003ffffff [10]
  5. 00000000ff800000 - 00000000ffffffff [02]

DXE code:  03e80000
DXE stack: 03e60000
HOB list:  03d5c000

Found UEFI firmware volume.
  GUID: 8c8ce578-8a3d-4f1c-9935-896185c32dd3
  length: 0x0000000000260000

Found DXE core at 0xffc14e0c
  Section 0: .text     size=000158a0 rva=00000240 in file=000158a0/00000240 flags=60000020
  Section 1: .data     size=00006820 rva=00015ae0 in file=00006820/00015ae0 flags=c0000040
  Section 2: .reloc    size=000010a0 rva=0001c300 in file=000010a0/0001c300 flags=42000040

Jumping to DXE core at 0x3e80000
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 3E96708
HOBLIST address in DXE = 0x3E56010
Memory Allocation 0x00000003 0x3E80000 - 0x3EBFFFF
FV Hob            0xFFC14D78 - 0xFFE74D77
InstallProtocolInterface: D8117CFE-94A6-11D4-9A3A-0090273FC14D 3E95EA0
InstallProtocolInterface: EE4E5898-3914-4259-9D6E-DC7BD79403CF 3E9630C

Security Arch Protocol not present!!

CPU Arch Protocol not present!!

Metronome Arch Protocol not present!!

Timer Arch Protocol not present!!

Bds Arch Protocol not present!!

Watchdog Timer Arch Protocol not present!!

Runtime Arch Protocol not present!!

Variable Arch Protocol not present!!

Variable Write Arch Protocol not present!!

Capsule Arch Protocol not present!!

Monotonic Counter Arch Protocol not present!!

Reset Arch Protocol not present!!

Real Time Clock Arch Protocol not present!!

ASSERT_EFI_ERROR (Status = Not Found)
ASSERT /home/reinauer/svn/Tiano/edk2/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c(461): !EFI_ERROR (Status)

Change-Id: I14068e9a28ff67ab1bf03105d56dab2e8be7b230
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2154
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-30 17:34:40 +01:00
3rdparty@4c0dcf96ae Update 3rdparty mark to latest repository 2013-01-05 01:31:12 +01:00
documentation Update gcov patch in documentation 2013-01-19 01:00:50 +01:00
payloads Project PIANO aka tianocoreboot 2013-01-30 17:34:40 +01:00
src Project PIANO aka tianocoreboot 2013-01-30 17:34:40 +01:00
util cbfstool: Prevent file name to be corrupted by basename(). 2013-01-30 03:07:34 +01:00
.gitignore add a few entries to .gitignore 2013-01-10 22:51:20 +01:00
.gitmodules Add 3rdparty as submodule 2012-05-01 00:08:37 +02:00
.gitreview add .gitreview 2012-11-01 23:13:39 +01:00
COPYING update license template. 2006-08-12 22:03:36 +00:00
Makefile Fix broken scan-build 2012-12-14 22:21:10 +01:00
Makefile.inc Implement GCC code coverage analysis 2013-01-12 19:09:55 +01:00
README Update README with newer version of the text from the web page 2011-06-15 10:16:33 +02:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * gcc / g++
 * make

Optional:

 * doxygen (for generating/viewing documentation)
 * iasl (for targets with ACPI support)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.