cd49cce7b7
This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
68 lines
2.1 KiB
Text
68 lines
2.1 KiB
Text
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2015 Google Inc
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <memlayout.h>
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#include <arch/header.ld>
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SECTIONS
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{
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/*
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* It would be good to lay down RAMSTAGE, ROMSTAGE, etc consecutively
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* like other architectures/chipsets it's not possible because of
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* the linking games played during romstage creation by trying
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* to find the final landing place in CBFS for XIP. Therefore,
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* conditionalize with macros.
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*/
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#if ENV_RAMSTAGE
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RAMSTAGE(CONFIG_RAMBASE, (CONFIG_RELOCATABLE_RAMSTAGE ? 8M :
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CONFIG_RAMTOP - CONFIG_RAMBASE))
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#elif ENV_ROMSTAGE
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/* The 1M size is not allocated. It's just for basic size checking.
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* Link at 32MiB address and rely on cbfstool to relocate to XIP. */
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ROMSTAGE(CONFIG_ROMSTAGE_ADDR, 1M)
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/* Pull in the cache-as-ram rules. */
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#include "car.ld"
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#elif ENV_VERSTAGE
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/* The 1M size is not allocated. It's just for basic size checking.
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* Link at 32MiB address and rely on cbfstool to relocate to XIP. */
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VERSTAGE(CONFIG_VERSTAGE_ADDR, 1M)
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/* Pull in the cache-as-ram rules. */
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#include "car.ld"
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#elif ENV_BOOTBLOCK
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/* This is for C_ENVIRONMENT_BOOTBLOCK. arch/x86/bootblock.ld contains
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* the logic for the romcc linking. */
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BOOTBLOCK(0xffffffff - CONFIG_C_ENV_BOOTBLOCK_SIZE + 1,
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CONFIG_C_ENV_BOOTBLOCK_SIZE)
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/* Pull in the cache-as-ram rules. */
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#include "car.ld"
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#elif ENV_POSTCAR
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POSTCAR(32M, 1M)
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#endif
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}
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#if ENV_BOOTBLOCK
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/* Bootblock specific scripts which provide more SECTION directives. */
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#include <cpu/x86/16bit/entry16.ld>
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#include <cpu/x86/16bit/reset16.ld>
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#include <arch/x86/id.ld>
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#if CONFIG(CPU_INTEL_FIRMWARE_INTERFACE_TABLE)
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#include <cpu/intel/fit/fit.ld>
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#endif
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#endif /* ENV_BOOTBLOCK */
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