2cd9c05dc1
This is a follow-up to CL:320623 to make veyron DRAM configs uniform (except for Rialto). As discussed in chrome-os-partner:43626, the mr[3] value and ODT are set diffently for Mickey, thus the .inc files for other boards have mr[3] = 1 and ODT disabled. BUG=none BRANCH=veyron TEST=compile tested for veyron Change-Id: I61798cfef779b0a3a510fd354ab53ffc63ca6c95 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 3b7cea6331bcec8aba09a204060e093d3dd732cb Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: Iacf821645a2dcceaed1c1c42e3e1b1c312b31eab Original-Reviewed-on: https://chromium-review.googlesource.com/321870 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/13109 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
50 lines
2.1 KiB
C
50 lines
2.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/io.h>
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#include <boardid.h>
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#include <console/console.h>
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#include <gpio.h>
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#include <soc/sdram.h>
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#include <string.h>
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#include <types.h>
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static struct rk3288_sdram_params sdram_configs[] = {
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#include "sdram_inf/sdram-lpddr3-samsung-2GB.inc" /* ram_code = 0000 */
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#include "sdram_inf/sdram-lpddr3-hynix-2GB.inc" /* ram_code = 0001 */
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#include "sdram_inf/sdram-unused.inc" /* ram_code = 0010 */
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#include "sdram_inf/sdram-lpddr3-hynix-2GB-2ranks.inc" /* ram_code = 0011 */
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#include "sdram_inf/sdram-ddr3-samsung-2GB.inc" /* ram_code = 0100 */
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#include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 0101 */
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#include "sdram_inf/sdram-ddr3-samsung-2GB.inc" /* ram_code = 0110 */
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#include "sdram_inf/sdram-lpddr3-elpida-2GB.inc" /* ram_code = 0111 */
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#include "sdram_inf/sdram-lpddr3-samsung-4GB.inc" /* ram_code = 1000 */
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#include "sdram_inf/sdram-lpddr3-hynix-4GB.inc" /* ram_code = 1001 */
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#include "sdram_inf/sdram-ddr3-nanya-2GB.inc" /* ram_code = 1010 */
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#include "sdram_inf/sdram-lpddr3-elpida-4GB.inc" /* ram_code = 1011 */
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#include "sdram_inf/sdram-unused.inc" /* ram_code = 1100 */
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#include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 1101 */
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#include "sdram_inf/sdram-ddr3-samsung-4GB.inc" /* ram_code = 1110 */
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#include "sdram_inf/sdram-ddr3-hynix-4GB.inc" /* ram_code = 1111 */
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};
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const struct rk3288_sdram_params *get_sdram_config()
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{
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u32 ramcode = ram_code();
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if (ramcode >= ARRAY_SIZE(sdram_configs)
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|| sdram_configs[ramcode].dramtype == UNUSED)
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die("Invalid RAMCODE.");
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return &sdram_configs[ramcode];
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}
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