coreboot-kgpe-d16/src/mainboard/asrock
Kyösti Mälkki cd7a70f487 soc/intel: Use common romstage code
This provides stack guards with checking and common
entry into postcar.

The code in cpu/intel/car/romstage.c is candidate
for becoming architectural so function prototype
is moved to <arch/romstage.h>.

Change-Id: I4c5a9789e7cf3f7f49a4a33e21dac894320a9639
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34893
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-26 21:08:41 +00:00
..
b75pro3-m sb/intel/{bd82x6x|ibexpeak}: Drop p_cnt_throttling_supported 2019-07-19 15:06:23 +00:00
e350m1 sb/amd/cimx/sb800: Get rid of power button device in coreboot 2019-05-20 14:43:44 +00:00
g41c-gs soc/intel: Use common romstage code 2019-08-26 21:08:41 +00:00
h81m-hds soc/intel: Use common romstage code 2019-08-26 21:08:41 +00:00
h110m mb/{asrock,intel,purism}: Copy channel arrays separately 2019-08-20 15:18:10 +00:00
imb-a180 src: Use 'include <string.h>' when appropriate 2019-03-20 20:27:51 +00:00
Kconfig
Kconfig.name