553967256f
Change-Id: Ia1e64c750dfa6901ac7c9e786952eed49cccfa17 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30322 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
42 lines
1.2 KiB
Text
42 lines
1.2 KiB
Text
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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* Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/acpi.h>
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DefinitionBlock(
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"dsdt.aml",
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"DSDT",
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0x02, // DSDT revision: ACPI v2.0 and up
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OEM_ID,
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ACPI_TABLE_CREATOR,
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0x20090419 // OEM revision
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)
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{
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// global NVS and variables
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#include "acpi/platform.asl"
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#include <southbridge/intel/i82801jx/acpi/globalnvs.asl>
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Scope (\_SB) {
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Device (PCI0)
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{
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#include <northbridge/intel/x4x/acpi/x4x.asl>
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#include <southbridge/intel/i82801jx/acpi/ich10.asl>
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#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
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}
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}
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/* Chipset specific sleep states */
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#include <southbridge/intel/i82801jx/acpi/sleepstates.asl>
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}
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