coreboot-kgpe-d16/src/northbridge/intel/sch
Kyösti Mälkki cf8e466084 Cleanup coreboot memory table includes
The includes removed here were previously required for
struct lb_memory and lb_add_memory_range().

Change-Id: Ie6c0d4ef55c2225aa709cf3fbad30ff1080e3610
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1391
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
2012-08-08 11:42:07 +02:00
..
acpi Unify IO APIC address specification 2012-04-12 00:06:11 +02:00
acpi.c Fix a few whitespace and coding style issues. 2010-12-18 13:22:37 +00:00
chip.h Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board 2010-12-18 07:48:43 +00:00
early_init.c Fix a few whitespace and coding style issues. 2010-12-18 13:22:37 +00:00
gma.c Fix a few whitespace and coding style issues. 2010-12-18 13:22:37 +00:00
Kconfig The same mechanisms are used for normal and fallback images. 2010-12-19 21:20:14 +00:00
Makefile.inc Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board 2010-12-18 07:48:43 +00:00
northbridge.c Cleanup coreboot memory table includes 2012-08-08 11:42:07 +02:00
nvs.h Fix a few whitespace and coding style issues. 2010-12-18 13:22:37 +00:00
pcie_config.c Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board 2010-12-18 07:48:43 +00:00
port_access.c Fix a few whitespace and coding style issues. 2010-12-18 13:22:37 +00:00
raminit.c fix compilation of intel/sch northbridge code with gcc 4.6 2011-10-14 08:12:25 +02:00
raminit.h Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board 2010-12-18 07:48:43 +00:00
sch.h Fix a few whitespace and coding style issues. 2010-12-18 13:22:37 +00:00