Arthur Heymans f7d1c8d1eb soc/intel/broadwell: Rework acpi/cpu.asl ... Use acpigen_write_processor_cnot to implement notifications to the CPU. Automatically generate \PPKG in SSDT. Change-Id: I79d2eed9b89b420554ce10d1fc0f151b1872afe2 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/29890 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>		2018-11-30 21:52:51 +00:00
..
acpi	soc/intel/broadwell: Rework acpi/cpu.asl	2018-11-30 21:52:51 +00:00
variants	src/{sb/intel,mb/google/auron}: Don't use device_t	2018-10-18 16:22:03 +00:00
acpi_tables.c
board_info.txt
chromeos.c
chromeos.fmd	mainboards: Add SMMSTORE region in chromeos configs	2018-09-12 12:25:30 +00:00
cmos.layout	mb/*/*/cmos.layout: Fix the values for the console level	2018-01-26 17:28:56 +00:00
dsdt.asl	mb: Set coreboot as DSDT's manufacturer model ID	2018-11-23 11:00:40 +00:00
ec.c	ec/google/chromeec: Add library function google_chromeec_events_init	2017-10-08 19:38:28 +00:00
ec.h
fadt.c	mb/*/*: Clean up FADT checksum assignment	2018-10-17 12:01:06 +00:00
hda_verb.c
Kconfig	mb/*/*/Kconfig: Use CONFIG_VARIANT_DIR for devicetree	2018-11-16 09:45:43 +00:00
Kconfig.name	google/buddy: Add board as variant of google/auron	2018-09-17 16:00:41 +00:00
mainboard.c	google/buddy: Add board as variant of google/auron	2018-09-17 16:00:41 +00:00
Makefile.inc	google/buddy: Add board as variant of google/auron	2018-09-17 16:00:41 +00:00
romstage.c	google/auron: Clean up variant-specific romstage code	2018-09-17 16:00:34 +00:00
smihandler.c
variant.h	src/{sb/intel,mb/google/auron}: Don't use device_t	2018-10-18 16:22:03 +00:00