f0c5be2a4f
Change-Id: Ibdff50761a205d936b0ebe067f418be0a2051798 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/29871 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hellsenberg <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: David Guckian Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
71 lines
1.5 KiB
Text
71 lines
1.5 KiB
Text
##
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## This file is part of the coreboot project.
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##
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## Copyright 2014 Rockchip Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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if BOARD_GOOGLE_VEYRON_RIALTO
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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select BOARD_ROMSIZE_KB_4096
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select COMMON_CBFS_SPI_WRAPPER
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select MAINBOARD_HAS_CHROMEOS
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select SOC_ROCKCHIP_RK3288
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select SPI_FLASH
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select SPI_FLASH_GIGADEVICE
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select SPI_FLASH_WINBOND
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select MAINBOARD_HAS_I2C_TPM_GENERIC
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select MAINBOARD_HAS_TPM1
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config VBOOT
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select VBOOT_PHYSICAL_REC_SWITCH
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select VBOOT_VBNV_FLASH
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config MAINBOARD_DIR
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string
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default google/veyron_rialto
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config MAINBOARD_PART_NUMBER
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string
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default "Veyron_Rialto"
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config MAINBOARD_VENDOR
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string
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default "Google"
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config BOOT_DEVICE_SPI_FLASH_BUS
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int
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default 2
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config DRIVER_TPM_I2C_BUS
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hex
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default 0x1
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config DRIVER_TPM_I2C_ADDR
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hex
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default 0x20
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config CONSOLE_SERIAL_UART_ADDRESS
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hex
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depends on DRIVERS_UART
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default 0xFF690000
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config PMIC_BUS
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int
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default 0
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config GBB_HWID
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string
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depends on CHROMEOS
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default "RIALTO TEST A-A 2322"
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endif # BOARD_GOOGLE_VEYRON_RIALTO
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