d6b58d5c76
Add a new apcb edit tool, apcb_v3a_edit.py, that injects SPDs into an APCB for phoenix platform. The tool makes several assumptions: * Each SPD only uses blocks 0, 1, 3 and 5. All other blocks are zero. * Each block is 64 bytes. * Dimm and socket are always 0 * Unused SPD entries are zero'd BUG=b:281983434 BRANCH=None TEST=build, flash, boot myst Change-Id: Ifb50287de77138170714a702ab87d56427aacfef Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76188 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
||
---|---|---|
.. | ||
README | ||
apcb_edit.py | ||
apcb_v3_edit.py | ||
apcb_v3a_edit.py | ||
description.md |
README
The necessary tools for building APCBs are not available for use by coreboot. This tool allows patching an existing APCB binary with specific SPDs and GPIO selection pins.