Change-Id: I005e607faa2a6c527584ba9cdcad92f4517a15e6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16778 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
20 lines
517 B
Text
20 lines
517 B
Text
chip northbridge/amd/gx2
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device cpu_cluster 0 on
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chip cpu/amd/geode_gx2
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device lapic 0 on end
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end
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end
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device domain 0 on
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device pci 1.0 on end
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device pci 1.1 on end
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chip southbridge/amd/cs5536
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register "lpc_serirq_enable" = "0x80" # enabled with default timing
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device pci d.0 on end # Realtek 8139 LAN
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device pci f.0 on end # ISA Bridge
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device pci f.2 on end # IDE Controller
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device pci f.3 on end # Audio
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device pci f.4 on end # OHCI
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device pci f.5 on end # EHCI
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end
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end
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end
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