coreboot-kgpe-d16/src/mainboard/amd/persimmon/BiosCallOuts.h
Martin Roth 30901baabc Persimmon: Fix warning, enable warnings as errors
- Fix redefinition warning for SB_GPIO_REG50 introduced in commit
     fa8702cf - http://review.coreboot.org/#/c/2446/
     Persimmon: adapt PCIe reset code copied from Inagua to actually
                 match Persimmon
     The warning being fixed is:
        SB800.h:1491, GNU Compiler 4 (gcc), Priority: Normal
        "SB_GPIO_REG50" redefined [enabled by default]

 - Enable warnings as errors so no more warnings will be accidentally
     committed.

Change-Id: Ib443b2bd2067f0b7d5f93f79170899a0f8f61060
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/2494
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-25 18:48:21 +01:00

73 lines
2.8 KiB
C

/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _BIOS_CALLOUT_H_
#define _BIOS_CALLOUT_H_
#include "Porting.h"
#include "AGESA.h"
#define BIOS_HEAP_START_ADDRESS 0x10000 /* HEAP during cold boot */
#define BIOS_HEAP_SIZE 0x20000
#define BSP_STACK_BASE_ADDR 0x30000
typedef struct _BIOS_HEAP_MANAGER {
//UINT32 AvailableSize;
UINT32 StartOfAllocatedNodes;
UINT32 StartOfFreedNodes;
} BIOS_HEAP_MANAGER;
typedef struct _BIOS_BUFFER_NODE {
UINT32 BufferHandle;
UINT32 BufferSize;
UINT32 NextNodeOffset;
} BIOS_BUFFER_NODE;
/*
* CALLOUTS
*/
AGESA_STATUS GetBiosCallout (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
/* REQUIRED CALLOUTS
* AGESA ADVANCED CALLOUTS - CPU
*/
AGESA_STATUS BiosAllocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
AGESA_STATUS BiosDeallocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
AGESA_STATUS BiosLocateBuffer (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
AGESA_STATUS BiosRunFuncOnAp (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
AGESA_STATUS BiosReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
AGESA_STATUS BiosGetIdsInitData (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
/* AGESA ADVANCED CALLOUTS - MEMORY */
AGESA_STATUS BiosReadSpd (UINT32 Func,UINT32 Data,VOID *ConfigPtr);
/* BIOS DEFAULT RET */
AGESA_STATUS BiosDefaultRet (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
/* Call the host environment interface to provide a user hook opportunity. */
AGESA_STATUS BiosHookBeforeDQSTraining (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
/* Call the host environment interface to provide a user hook opportunity. */
AGESA_STATUS BiosHookBeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
/* Call the host environment interface to provide a user hook opportunity. */
AGESA_STATUS BiosHookBeforeDramInitRecovery (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
/* Call the host environment interface to provide a user hook opportunity. */
AGESA_STATUS BiosHookBeforeExitSelfRefresh (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
/* PCIE slot reset control */
AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
#endif //_BIOS_CALLOUT_H_