coreboot-kgpe-d16/src/southbridge
Nico Huber d1fb5641b6 sandybridge: Add option to lock SPI regions on resume
Add an option to mark all SPI regions write protected on each S3 resume.
We were used to lock the SPI interface in the payload which isn't run on
the resume path. So we have to do it here.

For the write protection to be effective, all write opcodes in the
opmenu have to be marked correctly (as write operations) and the whole
SPI interface has to be locked. Both is already done.

Change-Id: I5c268ae8850642f5e82f18c28c71cf1ae248dbff
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/3594
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-10 00:48:33 +02:00
..
amd usbdebug: Drop duplicates of EHCI BAR relocation code 2013-07-01 17:10:55 +02:00
broadcom x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
dmp Add support for DMP Vortex86EX PCI southbridge. 2013-07-03 18:31:22 +02:00
intel sandybridge: Add option to lock SPI regions on resume 2013-07-10 00:48:33 +02:00
nvidia usbdebug: Drop duplicates of EHCI BAR relocation code 2013-07-01 17:10:55 +02:00
rdc x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
ricoh GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
sis usbdebug: Drop duplicates of EHCI BAR relocation code 2013-07-01 17:10:55 +02:00
ti GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
via early_smbus: Add early SMBus implementation for VIA chipsets 2013-06-10 19:07:26 +02:00
Kconfig Add support for DMP Vortex86EX PCI southbridge. 2013-07-03 18:31:22 +02:00
Makefile.inc Add support for DMP Vortex86EX PCI southbridge. 2013-07-03 18:31:22 +02:00