038e7247dc
Change-Id: I7f0d3400126d593bad8e78f95e6b9a378463b4ce Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/15963 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker Reviewed-by: Martin Roth <martinroth@google.com>
93 lines
2.2 KiB
C
93 lines
2.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2013 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <assert.h>
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#include <arch/exception.h>
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#include <arch/stages.h>
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#include <bootblock_common.h>
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#include <cbfs.h>
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#include <console/console.h>
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#include <program_loading.h>
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#include <soc/clock.h>
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#include <soc/nvidia/tegra/apbmisc.h>
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#include <soc/pinmux.h>
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#include <soc/power.h>
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#include <timestamp.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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static void run_next_stage(void *entry)
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{
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ASSERT(entry);
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clock_cpu0_config(entry);
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power_enable_and_ungate_cpu();
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/* Repair RAM on cluster0 and cluster1 after CPU is powered on. */
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ram_repair();
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clock_cpu0_remove_reset();
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clock_halt_avp();
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}
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void main(void)
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{
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// enable pinmux clamp inputs
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clamp_tristate_inputs();
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// enable JTAG at the earliest stage
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enable_jtag();
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clock_early_uart();
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// Serial out, tristate off.
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pinmux_set_config(PINMUX_KB_ROW9_INDEX, PINMUX_KB_ROW9_FUNC_UA3);
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// Serial in, tristate_on.
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pinmux_set_config(PINMUX_KB_ROW10_INDEX, PINMUX_KB_ROW10_FUNC_UA3 |
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PINMUX_PULL_UP |
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PINMUX_INPUT_ENABLE);
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// Mux some pins away from uart A.
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pinmux_set_config(PINMUX_UART2_CTS_N_INDEX,
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PINMUX_UART2_CTS_N_FUNC_UB3 |
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PINMUX_INPUT_ENABLE);
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pinmux_set_config(PINMUX_UART2_RTS_N_INDEX,
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PINMUX_UART2_RTS_N_FUNC_UB3);
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if (CONFIG_BOOTBLOCK_CONSOLE) {
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console_init();
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exception_init();
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}
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clock_init();
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bootblock_mainboard_init();
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pinmux_set_config(PINMUX_CORE_PWR_REQ_INDEX,
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PINMUX_CORE_PWR_REQ_FUNC_PWRON);
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pinmux_set_config(PINMUX_CPU_PWR_REQ_INDEX,
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PINMUX_CPU_PWR_REQ_FUNC_CPU);
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pinmux_set_config(PINMUX_PWR_INT_N_INDEX,
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PINMUX_PWR_INT_N_FUNC_PMICINTR |
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PINMUX_INPUT_ENABLE);
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timestamp_init(0);
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run_romstage();
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}
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void platform_prog_run(struct prog *prog)
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{
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run_next_stage(prog_entry(prog));
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}
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