Arthur Heymans a8a9f34e9b sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tables ... Both southbridges need to be done at once since this southbridge code is used for different northbridges, which fails to compile when done separately. This needs an acpi_name functions in the northbridge code to be defined. TESTED on Intel DG43GT: show correct PIRQ ACPI entries in /sys/firmware/acpi/tables/SSDT. Change-Id: I286d251ddf8fcae27dd07011a1cd62d8f4847683 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/22981 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>		2018-06-29 07:45:30 +00:00
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ec.asl	mainboard/intel: Update license headers	2016-04-13 17:31:12 +02:00
ich7_pci_irqs.asl
platform.asl
superio.asl	mainboard/intel: Update license headers	2016-04-13 17:31:12 +02:00