coreboot-kgpe-d16/src/mainboard/tyan/s2912_fam10
Nico Huber d23ee5de22 mainboard: Clean up boot_option/reboot_bits in cmos.layout
Since commit 3bfd7cc (drivers/pc80: Rework normal / fallback selector
code) the reboot counter stored in `reboot_bits` isn't reset on a reboot
with `boot_option = 1` any more. Hence, with SKIP_MAX_REBOOT_CNT_CLEAR
enabled, later stages (e.g. payload, OS) have to clear the counter too,
when they want to switch to normal boot. So change the bits to (h)ex
instead of (r)eserved.

To clarify their meaning, rename `reboot_bits` to `reboot_counter`. Also
remove all occurences of the obsolete `last_boot` bit that have sneaked
in again since 24391321 (mainboard: Remove last_boot NVRAM option).

Change-Id: Ib3fc38115ce951b75374e0d1347798b23db7243c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/16157
Tested-by: build bot (Jenkins)
Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>
Reviewed-by: York Yang <york.yang@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-17 00:27:42 +02:00
..
board_info.txt src/mainboard/*/*/board_info.txt: Added Release year for boards 2015-04-23 14:42:44 +02:00
cmos.layout mainboard: Clean up boot_option/reboot_bits in cmos.layout 2016-08-17 00:27:42 +02:00
devicetree.cb Drop drivers/generic/debug 2014-04-22 13:42:48 +02:00
get_bus_conf.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
irq_tables.c mainboard: Format irq_tables.c 2016-07-31 18:44:00 +02:00
Kconfig AMD Kconfig: Remove QRANK_DIMM_SUPPORT from unsupported platforms 2015-08-23 17:12:04 +00:00
Kconfig.name kconfig: automatically include mainboards 2015-04-18 08:31:08 +02:00
mb_sysconf.h tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
mptable.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
resourcemap.c src/mainboard: Capitalize ROM, RAM, CPU and APIC 2016-08-14 19:06:25 +02:00
romstage.c lib: compile mdelay for romstage 2016-01-22 22:15:09 +01:00