714e2a1ac1
of devices/oprom/x86.c. We have some tests on hardware. Moving RAMBASE to 1MB needs to wait a bit until C7 cache_as_ram.inc has been adapted to cache that area or things will become incredibly slow (1.5s boot time instead of 0.5) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5488 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
8 lines
108 B
Text
8 lines
108 B
Text
config NORTHBRIDGE_VIA_VX800
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bool
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config FALLBACK_SIZE
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int
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default 0
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depends on NORTHBRIDGE_VIA_VX800
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