coreboot-kgpe-d16/src/cpu
Duncan Laurie d2e00b92ce SMM: Add heap region and move C handler higher in region
In order to support SPI and ELOG drivers the SMM region
needs to be able to be larger than the previous allocation
below 0x7400.  Now that we have support for 4M TSEG we do
not need to live in this region.

This change adds a 16KB heap region abofe the save state area
at TSEG+64KB and moves the C handler above this.

The heap region is then available for malloc and the C handler
can grow to support flash and event log features.

While updating the memory map comment in assembly stub I also
added a pause instruction to the cpu spin lock as this was
added to the C code in latest upstream rebase.

Dump sympbols from smm.elf binary to see the new regions:

00010000 B _heap
00014000 B _eheap
00014000 T _smm_c_handler_start
0001b240 T _smm_c_handler_end

Change-Id: I45f0ab4df1fdef3b626f877094a58587476ac634
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/1308
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-07-24 23:40:54 +02:00
..
amd AMD CPUs: Updated CPU list in powernow_acpi.c 2012-07-22 17:01:13 +02:00
intel CPU: Update ivybridge PP1 current limit value 2012-07-24 23:39:58 +02:00
via Replace cache control magic numbers with symbols 2012-04-25 16:27:07 +02:00
x86 SMM: Add heap region and move C handler higher in region 2012-07-24 23:40:54 +02:00
Kconfig Config changes to support microcode in CBFS 2012-07-24 23:15:35 +02:00
Makefile.inc qemu: drop "northbridge.c" from src/cpu/... 2010-03-29 21:17:25 +00:00