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coreboot-kgpe-d16/src/cpu/intel
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Kyösti Mälkki 53c1d204ed Intel cpus: use CPU_PHYSMASK_HI define in CAR 
Unifies models 6ex, 6fx and 106cx.

Change-Id: I2bb632c7148a7d937f24eb559f7f4e539d227470
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/638
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-02-16 01:55:50 +01:00
..
car Remove XIP_ROM_BASE 2011-11-01 19:06:23 +01:00
ep80579 MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
hyperthreading Rename build system variables to be more intuitive, and 2010-09-30 16:55:02 +00:00
microcode Make update-microcodes.sh executable. 2010-10-18 00:20:40 +00:00
model_6bx MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_6dx MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_6ex Intel cpus: use CPU_PHYSMASK_HI define in CAR 2012-02-16 01:55:50 +01:00
model_6fx Intel cpus: use CPU_PHYSMASK_HI define in CAR 2012-02-16 01:55:50 +01:00
model_6xx MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_65x MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_67x MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_68x MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_69x MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_106cx Intel cpus: use CPU_PHYSMASK_HI define in CAR 2012-02-16 01:55:50 +01:00
model_1067x Intel cpus: apply un-written naming rules 2012-02-10 23:40:07 +01:00
model_f0x MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_f1x MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_f2x MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_f3x MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
model_f4x MTRR: get physical address size from CPUID 2012-01-10 21:51:40 +01:00
slot_1 cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs. 2011-08-04 08:10:12 +02:00
slot_2 Drop unused DCACHE_RAM_BASE from intel/car/cache_as_ram.inc-using sockets. 2010-10-15 07:47:51 +00:00
socket_441 oops. this is weird. CAR addresses should be specified in the socket and not in 2011-01-27 01:11:20 +00:00
socket_BGA956 Intel cpus: apply un-written naming rules 2012-02-10 23:40:07 +01:00
socket_FC_PGA370 Get rid of the old romstage-as-bootblock ROM layout 2011-10-28 22:17:36 +02:00
socket_LGA771 Intel cpus: apply un-written naming rules 2012-02-10 23:40:07 +01:00
socket_mFCBGA479 Move "select CACHE_AS_RAM" lines from boards into CPU socket. 2010-12-08 08:22:04 +00:00
socket_mFCPGA478 Intel cpus: apply un-written naming rules 2012-02-10 23:40:07 +01:00
socket_mPGA478 Rename build system variables to be more intuitive, and 2010-09-30 16:55:02 +00:00
socket_mPGA479M Move "select CACHE_AS_RAM" lines from boards into CPU socket. 2010-12-08 08:22:04 +00:00
socket_mPGA603 Rename build system variables to be more intuitive, and 2010-09-30 16:55:02 +00:00
socket_mPGA604 Rename build system variables to be more intuitive, and 2010-09-30 16:55:02 +00:00
socket_PGA370 Drop unused DCACHE_RAM_BASE from intel/car/cache_as_ram.inc-using sockets. 2010-10-15 07:47:51 +00:00
speedstep ACPI: mark empty get_cst_entries() weak 2012-01-09 11:07:18 +01:00
thermal_monitoring
Kconfig Intel cpus: apply un-written naming rules 2012-02-10 23:40:07 +01:00
Makefile.inc Intel cpus: apply un-written naming rules 2012-02-10 23:40:07 +01:00