fcbebb61c5
No board in the tree selects this and it looks like the implementation was done at chipset level while it should be part of PCI subsystem. When enabled, at least AMD K8 and f14, f15tn and f16kb fail build test. Feature of placing prefetchable PCI memory above 4GB may not work if there is any 32-bit only prefetchable PCI BARs in the system. Change-Id: I40ded2c7d6d05f461423721aa5d78a78f9f9ce1e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8705 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
81 lines
1.7 KiB
Text
81 lines
1.7 KiB
Text
##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2010 Uwe Hermann <uwe@hermann-uwe.de>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc.
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##
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if BOARD_ASUS_M2N_E
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select CPU_AMD_SOCKET_AM2
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select DIMM_DDR2
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select NORTHBRIDGE_AMD_AMDK8
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select SOUTHBRIDGE_NVIDIA_MCP55
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select HT_CHAIN_DISTRIBUTE
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select MCP55_USE_NIC
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select MCP55_USE_AZA
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select SUPERIO_ITE_IT8716F
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select SUPERIO_ITE_IT8716F_OVERRIDE_FANCTL
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select PARALLEL_CPU_INIT
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select HAVE_OPTION_TABLE
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select HAVE_MP_TABLE
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select LIFT_BSP_APIC_ID
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select BOARD_ROMSIZE_KB_512
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select K8_ALLOCATE_IO_RANGE
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config MAINBOARD_DIR
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string
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default asus/m2n-e
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config DCACHE_RAM_BASE
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hex
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default 0xc8000
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config DCACHE_RAM_SIZE
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hex
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default 0x08000
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config APIC_ID_OFFSET
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hex
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default 0x10
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config MEM_TRAIN_SEQ
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int
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default 2
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config MAINBOARD_PART_NUMBER
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string
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default "M2N-E"
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config MAX_CPUS
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int
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default 2
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config MAX_PHYSICAL_CPUS
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int
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default 1
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config HT_CHAIN_UNITID_BASE
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hex
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default 0x0
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x20
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endif # BOARD_ASUS_M2N_E
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