6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
55 lines
1.4 KiB
C
55 lines
1.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/mmu.h>
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#include <symbols.h>
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#include <soc/emi.h>
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#include <soc/mmu_operations.h>
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__weak void mtk_soc_after_dram(void) { /* do nothing */ }
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void mtk_mmu_init(void)
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{
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mmu_init();
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/*
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* Set 0x0 to 4GB address as device memory. We want to config IO_PHYS
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* address to DEV_MEM, and map a proper range of dram for the memory
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* test during calibration.
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*/
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mmu_config_range((void *)0, (uintptr_t)4U * GiB, DEV_MEM);
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/* SRAM is cached */
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mmu_config_range(_sram, REGION_SIZE(sram), SECURE_CACHED_MEM);
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/* L2C SRAM is cached */
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mmu_config_range(_sram_l2c, REGION_SIZE(sram_l2c), SECURE_CACHED_MEM);
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/* DMA is non-cached and is reserved for TPM & da9212 I2C DMA */
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mmu_config_range(_dma_coherent, REGION_SIZE(dma_coherent),
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SECURE_UNCACHED_MEM);
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mmu_enable();
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}
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void mtk_mmu_after_dram(void)
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{
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/* Map DRAM as cached now that it's up and running */
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mmu_config_range(_dram, (uintptr_t)sdram_size(), NONSECURE_CACHED_MEM);
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mtk_soc_after_dram();
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}
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void mtk_mmu_disable_l2c_sram(void)
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{
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/* Unmap L2C SRAM so it can be reclaimed by L2 cache */
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/* TODO: Implement true unmapping, and also use it for the zero-page! */
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mmu_config_range(_sram_l2c, REGION_SIZE(sram_l2c), DEV_MEM);
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/* Careful: changing cache geometry while it's active is a bad idea! */
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mmu_disable();
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mtk_soc_disable_l2c_sram();
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/* Reenable MMU with now enlarged L2 cache. Page tables still valid. */
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mmu_enable();
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}
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