13f1c2af8b
1. x86_setup_mtrr take address bit.
2. generic ht, pcix, pcie beidge...
3. scan bus and reset_bus
4. ht read ctrl to decide if the ht chain
is ready
5. Intel e7520 and e7525 support
6. new ich5r support
7. intel sb 6300 support.
yhlu patch
1. split x86_setup_mtrrs to fixed and var
2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource
3. in_conherent.c K8_SCAN_PCI_BUS
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
38 lines
781 B
C
38 lines
781 B
C
#include <console/console.h>
|
|
#include <part/fallback_boot.h>
|
|
#include <part/watchdog.h>
|
|
#include <pc80/mc146818rtc.h>
|
|
#include <arch/io.h>
|
|
|
|
|
|
#if HAVE_FALLBACK_BOOT == 1
|
|
void set_boot_successful(void)
|
|
{
|
|
/* Remember I succesfully booted by setting
|
|
* the initial boot direction
|
|
* to the direction that I booted.
|
|
*/
|
|
unsigned char index, byte;
|
|
index = inb(RTC_PORT(0)) & 0x80;
|
|
index |= RTC_BOOT_BYTE;
|
|
outb(index, RTC_PORT(0));
|
|
|
|
byte = inb(RTC_PORT(1));
|
|
byte &= 0xfe;
|
|
byte |= (byte & (1 << 1)) >> 1;
|
|
|
|
/* If we are in normal mode set the boot count to 0 */
|
|
if(byte & 1)
|
|
byte &= 0x0f;
|
|
outb(byte, RTC_PORT(1));
|
|
}
|
|
#endif
|
|
|
|
void boot_successful(void)
|
|
{
|
|
/* Remember this was a successful boot */
|
|
set_boot_successful();
|
|
|
|
/* turn off the boot watchdog */
|
|
watchdog_off();
|
|
}
|