479 lines
12 KiB
C
479 lines
12 KiB
C
#ifndef GPIO_NAMES_ICELAKE_H
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#define GPIO_NAMES_ICELAKE_H
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#include "gpio_groups.h"
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static const char *const icelake_pch_h_group_g_names[] = {
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/* GPP_G */
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"GPP_G0", "SD3_CMD",
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"GPP_G1", "SD3_D0",
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"GPP_G2", "SD3_D1",
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"GPP_G3", "SD3_D2",
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"GPP_G4", "SD3_D3",
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"GPP_G5", "SD3_CDB",
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"GPP_G6", "SD3_CLK",
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"GPP_G7", "SD3_WP",
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};
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static const char *const icelake_pch_h_group_b_names[] = {
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/* GPP_B */
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"GPP_B0", "CORE_VID_0",
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"GPP_B1", "CORE_VID_1",
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"GPP_B2", "VRALERTB",
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"GPP_B3", "CPU_GP_2",
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"GPP_B4", "CPU_GP_3",
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"GPP_B5", "ISH_I2C0_SDA",
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"GPP_B6", "ISH_I2C0_SCL",
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"GPP_B7", "ISH_I2C1_SDA",
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"GPP_B8", "ISH_I2C1_SCL",
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"GPP_B9", "I2C5_SDA",
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"GPP_B10", "I2C5_SCL",
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"GPP_B11", "PMCALERTB",
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"GPP_B12", "SLP_S0B",
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"GPP_B13", "PLTRSTB",
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"GPP_B14", "SPKR",
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"GPP_B15", "GSPI0_CS0B",
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"GPP_B16", "GSPI0_CLK",
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"GPP_B17", "GSPI0_MISO",
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"GPP_B18", "GSPI0_MOSI",
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"GPP_B19", "GSPI1_CS0B",
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"GPP_B20", "GSPI1_CLK",
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"GPP_B21", "GSPI1_MISO",
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"GPP_B22", "GSPI1_MOSI",
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"GPP_B23", "SML1ALERTB",
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"GPP_B24", "GSPI0_CLK_LOOPBK",
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"GPP_B25", "GSPI1_CLK_LOOPBK",
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};
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static const char *const icelake_pch_h_group_a_names[] = {
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/* GPP_A */
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"GPP_A0", "ESPI_IO_0",
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"GPP_A1", "ESPI_IO_1",
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"GPP_A2", "ESPI_IO_2",
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"GPP_A3", "ESPI_IO_3",
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"GPP_A4", "ESPI_CSB",
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"GPP_A5", "ESPI_CLK",
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"GPP_A6", "ESPI_RESETB",
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"GPP_A7", "I2S2_SCLK",
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"GPP_A8", "I2S2_SFRM",
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"GPP_A9", "I2S2_TXD",
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"GPP_A10", "I2S2_RXD",
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"GPP_A11", "SATA_DEVSLP_2",
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"GPP_A12", "SATAXPCIE_1",
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"GPP_A13", "SATAXPCIE_2",
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"GPP_A14", "USB2_OCB_1",
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"GPP_A15", "USB2_OCB_2",
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"GPP_A16", "USB2_OCB_3",
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"GPP_A17", "DDSP_HPD_C",
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"GPP_A18", "DDSP_HPD_B",
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"GPP_A19", "DDSP_HPD_1",
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"GPP_A20", "DDSP_HPD_2",
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"GPP_A21", "I2S5_TXD",
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"GPP_A22", "I2S5_RXD",
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"GPP_A23", "I2S1_SCLK",
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"GPP_A24", "ESPI_CLK_LOOPBK",
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};
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static const char *const icelake_pch_h_group_h_names[] = {
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/* GPP_H */
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"GPP_H0", "SD_1P8_SEL",
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"GPP_H1", "SD_PWR_EN_B",
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"GPP_H2", "GPPC_H_2",
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"GPP_H3", "SX_EXIT_HOLDOFFB",
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"GPP_H4", "I2C2_SDA",
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"GPP_H5", "I2C2_SCL",
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"GPP_H6", "I2C3_SDA",
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"GPP_H7", "I2C3_SCL",
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"GPP_H8", "I2C4_SDA",
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"GPP_H9", "I2C4_SCL",
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"GPP_H10", "SRCCLKREQB_4",
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"GPP_H11", "SRCCLKREQB_5",
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"GPP_H12", "M2_SKT2_CFG_0",
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"GPP_H13", "M2_SKT2_CFG_1",
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"GPP_H14", "M2_SKT2_CFG_2",
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"GPP_H15", "M2_SKT2_CFG_3",
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"GPP_H16", "DDPB_CTRLCLK",
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"GPP_H17", "DDPB_CTRLDATA",
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"GPP_H18", "CPU_VCCIO_PWR_GATEB",
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"GPP_H19", "TIME_SYNC_0",
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"GPP_H20", "IMGCLKOUT_1",
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"GPP_H21", "IMGCLKOUT_2",
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"GPP_H22", "IMGCLKOUT_3",
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"GPP_H23", "IMGCLKOUT_4",
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};
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static const char *const icelake_pch_h_group_d_names[] = {
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/* GPP_D */
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"GPP_D0", "ISH_GP_0",
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"GPP_D1", "ISH_GP_1",
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"GPP_D2", "ISH_GP_2",
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"GPP_D3", "ISH_GP_3",
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"GPP_D4", "IMGCLKOUT_0",
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"GPP_D5", "SRCCLKREQB_0",
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"GPP_D6", "SRCCLKREQB_1",
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"GPP_D7", "SRCCLKREQB_2",
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"GPP_D8", "SRCCLKREQB_3",
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"GPP_D9", "ISH_SPI_CSB",
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"GPP_D10", "ISH_SPI_CLK",
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"GPP_D11", "ISH_SPI_MISO",
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"GPP_D12", "ISH_SPI_MOSI",
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"GPP_D13", "ISH_UART0_RXD",
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"GPP_D14", "ISH_UART0_TXD",
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"GPP_D15", "ISH_UART0_RTSB",
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"GPP_D16", "ISH_UART0_CTSB",
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"GPP_D17", "ISH_GP_4",
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"GPP_D18", "ISH_GP_5",
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"GPP_D19", "I2S_MCLK",
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"GPP_D10", "GSPI2_CLK_LOOPBK",
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};
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static const char *const icelake_pch_h_group_f_names[] = {
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/* GPP_F */
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"GPP_F0", "CNV_BRI_DT",
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"GPP_F1", "CNV_BRI_RSP",
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"GPP_F2", "CNV_RGI_DT",
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"GPP_F3", "CNV_RGI_RSP",
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"GPP_F4", "CNV_RF_RESET_B",
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"GPP_F5", "EMMC_HIP_MON",
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"GPP_F6", "CNV_PA_BLANKING",
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"GPP_F7", "EMMC_CMD",
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"GPP_F8", "EMMC_DATA0",
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"GPP_F9", "EMMC_DATA1",
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"GPP_F10", "EMMC_DATA2",
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"GPP_F11", "EMMC_DATA3",
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"GPP_F12", "EMMC_DATA4",
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"GPP_F13", "EMMC_DATA5",
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"GPP_F14", "EMMC_DATA6",
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"GPP_F15", "EMMC_DATA7",
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"GPP_F16", "EMMC_RCLK",
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"GPP_F17", "EMMC_CLK",
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"GPP_F18", "EMMC_RESETB",
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"GPP_F19", "A4WP_PRESENT",
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};
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static const char *const icelake_pch_h_group_vgpio_names[] = {
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/* vGPIO */
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"CNV_BTEN", "",
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"CNV_WCEN", "",
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"CNV_BT_HOST_WAKEB", "",
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"CNV_BT_IF_SELECT", "",
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"vCNV_BT_UART_TXD", "",
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"vCNV_BT_UART_RXD", "",
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"vCNV_BT_UART_CTS_B", "",
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"vCNV_BT_UART_RTS_B", "",
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"vCNV_MFUART1_TXD", "",
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"vCNV_MFUART1_RXD", "",
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"vCNV_MFUART1_CTS_B", "",
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"vCNV_MFUART1_RTS_B", "",
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"vUART0_TXD", "",
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"vUART0_RXD", "",
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"vUART0_CTS_B", "",
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"vUART0_RTS_B", "",
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"vISH_UART0_TXD", "",
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"vISH_UART0_RXD", "",
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"vISH_UART0_CTS_B", "",
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"vISH_UART0_RTS_B", "",
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"vCNV_BT_I2S_BCLK", "",
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"vCNV_BT_I2S_WS_SYNC", "",
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"vCNV_BT_I2S_SDO", "",
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"vCNV_BT_I2S_SDI", "",
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"vI2S2_SCLK", "",
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"vI2S2_SFRM", "",
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"vI2S2_TXD", "",
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"vI2S2_RXD", "",
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"vSD3_CD_B", "",
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};
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static const char *const icelake_pch_h_group_c_names[] = {
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/* GPP_C */
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"GPP_C0", "SMBCLK",
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"GPP_C1", "SMBDATA",
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"GPP_C2", "SMBALERTB",
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"GPP_C3", "SML0CLK",
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"GPP_C4", "SML0DATA",
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"GPP_C5", "SML0ALERTB",
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"GPP_C6", "SML1CLK",
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"GPP_C7", "SML1DATA",
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"GPP_C8", "UART0_RXD",
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"GPP_C9", "UART0_TXD",
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"GPP_C10", "UART0_RTSB",
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"GPP_C11", "UART0_CTSB",
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"GPP_C12", "UART1_RXD",
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"GPP_C13", "UART1_TXD",
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"GPP_C14", "UART1_RTSB",
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"GPP_C15", "UART1_CTSB",
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"GPP_C16", "I2C0_SDA",
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"GPP_C17", "I2C0_SCL",
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"GPP_C18", "I2C1_SDA",
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"GPP_C19", "I2C1_SCL",
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"GPP_C20", "UART2_RXD",
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"GPP_C21", "UART2_TXD",
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"GPP_C22", "UART2_RTSB",
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"GPP_C23", "UART2_CTSB",
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};
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static const char *const icelake_pch_h_group_hvcmos_names[] = {
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/* HVCMOS */
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"L_BKLTEN", "",
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"L_BKLTCTL", "",
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"L_VDDEN", "",
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"SYS_PWROK", "",
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"SYS_RESETB", "",
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"MLK_RSTB", "",
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};
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static const char *const icelake_pch_h_group_e_names[] = {
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/* GPP_E */
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"GPP_E0", "SATAXPCIE_0",
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"GPP_E1", "SPI1_IO_2",
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"GPP_E2", "SPI1_IO_3",
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"GPP_E3", "CPU_GP_0",
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"GPP_E4", "SATA_DEVSLP_0",
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"GPP_E5", "SATA_DEVSLP_1",
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"GPP_E6", "GPPC_E_6",
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"GPP_E7", "CPU_GP_1",
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"GPP_E8", "SATA_LEDB",
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"GPP_E9", "USB2_OCB_0",
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"GPP_E10", "SPI1_CSB",
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"GPP_E11", "SPI1_CLK",
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"GPP_E12", "SPI1_MISO_IO_1",
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"GPP_E13", "SPI1_MOSI_IO_0",
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"GPP_E14", "DDSP_HPD_A",
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"GPP_E15", "ISH_GP_6",
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"GPP_E16", "ISH_GP_7",
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"GPP_E17", "DISP_MISC_4",
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"GPP_E18", "DDP1_CTRLCLK",
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"GPP_E19", "DDP1_CTRLDATA",
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"GPP_E20", "DDP2_CTRLCLK",
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"GPP_E21", "DDP2_CTRLDATA",
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"GPP_E22", "DDPA_CTRLCLK",
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"GPP_E23", "DDPA_CTRLDATA",
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};
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static const char *const icelake_pch_h_group_jtag_names[] = {
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/* JTAG */
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"JTAG0", "JTAG_TDO",
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"JTAG1", "JTAGX",
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"JTAG2", "PRDYB",
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"JTAG3", "PREQB",
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"JTAG4", "CPU_TRSTB",
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"JTAG5", "JTAG_TDI",
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"JTAG6", "JTAG_TMS",
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"JTAG7", "JTAG_TCK",
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"JTAG8", "ITP_PMODE",
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};
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static const char *const icelake_pch_h_group_r_names[] = {
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/* GPP_R */
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"GPP_R0", "HDA_BCLK",
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"GPP_R1", "HDA_SYNC",
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"GPP_R2", "HDA_SDO",
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"GPP_R3", "HDA_SDI_0",
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"GPP_R4", "HDA_RSTB",
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"GPP_R5", "HDA_SDI_1",
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"GPP_R6", "I2S1_TXD",
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"GPP_R7", "I2S1_RXD",
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};
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static const char *const icelake_pch_h_group_s_names[] = {
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/* GPP_S */
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"GPP_S0", "SNDW1_CLK",
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"GPP_S1", "SNDW1_DATA",
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"GPP_S2", "SNDW2_CLK",
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"GPP_S3", "SNDW2_DATA",
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"GPP_S4", "SNDW3_CLK",
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"GPP_S5", "SNDW3_DATA",
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"GPP_S6", "SNDW4_CLK",
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"GPP_S7", "SNDW4_DATA",
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};
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static const char *const icelake_pch_h_group_spi_names[] = {
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/* SPI */
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"SPIP0", "SPI0_IO_2",
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"SPIP1", "SPI0_IO_3",
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"SPIP2", "SPI0_MOSI_IO_0",
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"SPIP3", "SPI0_MISO_IO_1",
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"SPIP4", "SPI0_TPM_CSB",
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"SPIP5", "SPI0_FLASH_0_CSB",
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"SPIP6", "SPI0_FLASH_1_CSB",
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"SPIP7", "SPI0_CLK",
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"SPIP8", "SPI0_CLK_LOOPBK",
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};
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/* Ice Lake-LP */
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static const struct gpio_group icelake_pch_h_group_g = {
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.display = "------- GPIO Group GPP_G -------",
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.pad_count = ARRAY_SIZE(icelake_pch_h_group_g_names) / 2,
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.func_count = 2,
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.pad_names = icelake_pch_h_group_g_names,
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};
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static const struct gpio_group icelake_pch_h_group_b = {
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.display = "------- GPIO Group GPP_B -------",
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.pad_count = ARRAY_SIZE(icelake_pch_h_group_b_names) / 2,
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.func_count = 2,
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.pad_names = icelake_pch_h_group_b_names,
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};
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static const struct gpio_group icelake_pch_h_group_a = {
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.display = "------- GPIO Group GPP_A -------",
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.pad_count = ARRAY_SIZE(icelake_pch_h_group_a_names) / 2,
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.func_count = 2,
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.pad_names = icelake_pch_h_group_a_names,
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};
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static const struct gpio_group *const icelake_pch_h_community_0_groups[] = {
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&icelake_pch_h_group_g,
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&icelake_pch_h_group_b,
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&icelake_pch_h_group_a,
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};
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static const struct gpio_community icelake_pch_h_community_0 = {
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.name = "------- GPIO Community 0 -------",
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.pcr_port_id = 0x6e,
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.group_count = ARRAY_SIZE(icelake_pch_h_community_0_groups),
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.groups = icelake_pch_h_community_0_groups,
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};
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static const struct gpio_group icelake_pch_h_group_h = {
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.display = "------- GPIO Group GPP_H -------",
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.pad_count = ARRAY_SIZE(icelake_pch_h_group_h_names) / 2,
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.func_count = 2,
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.pad_names = icelake_pch_h_group_h_names,
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};
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static const struct gpio_group icelake_pch_h_group_d = {
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.display = "------- GPIO Group GPP_D -------",
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.pad_count = ARRAY_SIZE(icelake_pch_h_group_d_names) / 2,
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.func_count = 2,
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.pad_names = icelake_pch_h_group_d_names,
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};
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static const struct gpio_group icelake_pch_h_group_f = {
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.display = "------- GPIO Group GPP_F -------",
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.pad_count = ARRAY_SIZE(icelake_pch_h_group_f_names) / 2,
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.func_count = 2,
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.pad_names = icelake_pch_h_group_f_names,
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};
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static const struct gpio_group icelake_pch_h_group_vgpio_0 = {
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.display = "------- GPIO Group vGPIO_0 -------",
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.pad_count = ARRAY_SIZE(icelake_pch_h_group_vgpio_names) / 2,
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.func_count = 2,
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.pad_names = icelake_pch_h_group_vgpio_names,
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};
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static const struct gpio_group *const icelake_pch_h_community_1_groups[] = {
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&icelake_pch_h_group_h,
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&icelake_pch_h_group_d,
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&icelake_pch_h_group_f,
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&icelake_pch_h_group_vgpio_0,
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};
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static const struct gpio_community icelake_pch_h_community_1 = {
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.name = "------- GPIO Community 1 -------",
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.pcr_port_id = 0x6d,
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.group_count = ARRAY_SIZE(icelake_pch_h_community_1_groups),
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.groups = icelake_pch_h_community_1_groups,
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};
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static const struct gpio_community icelake_pch_h_community_2 = {
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.name = "------- GPIO Community 2 (skipped)-------",
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.pcr_port_id = 0x6c,
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.group_count = 0,
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};
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static const struct gpio_community icelake_pch_h_community_3 = {
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.name = "------- GPIO Community 3 (skipped)-------",
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.pcr_port_id = 0x6b,
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.group_count = 0,
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};
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static const struct gpio_group icelake_pch_h_group_c = {
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.display = "------- GPIO Group GPP_C -------",
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.pad_count = ARRAY_SIZE(icelake_pch_h_group_c_names) / 2,
|
|
.func_count = 2,
|
|
.pad_names = icelake_pch_h_group_c_names,
|
|
};
|
|
|
|
static const struct gpio_group icelake_pch_h_group_hvcmos = {
|
|
.display = "------- GPIO Group HVCMOS -------",
|
|
.pad_count = ARRAY_SIZE(icelake_pch_h_group_hvcmos_names) / 2,
|
|
.func_count = 2,
|
|
.pad_names = icelake_pch_h_group_hvcmos_names,
|
|
};
|
|
|
|
static const struct gpio_group icelake_pch_h_group_e = {
|
|
.display = "------- GPIO Group E -------",
|
|
.pad_count = ARRAY_SIZE(icelake_pch_h_group_e_names) / 2,
|
|
.func_count = 2,
|
|
.pad_names = icelake_pch_h_group_e_names,
|
|
};
|
|
|
|
static const struct gpio_group icelake_pch_h_group_jtag = {
|
|
.display = "------- GPIO Group JTAG -------",
|
|
.pad_count = ARRAY_SIZE(icelake_pch_h_group_jtag_names) / 2,
|
|
.func_count = 2,
|
|
.pad_names = icelake_pch_h_group_jtag_names,
|
|
};
|
|
|
|
static const struct gpio_group *const icelake_pch_h_community_4_groups[] = {
|
|
&icelake_pch_h_group_c,
|
|
&icelake_pch_h_group_hvcmos,
|
|
&icelake_pch_h_group_e,
|
|
&icelake_pch_h_group_jtag,
|
|
};
|
|
|
|
static const struct gpio_community icelake_pch_h_community_4 = {
|
|
.name = "------- GPIO Community 4 -------",
|
|
.pcr_port_id = 0x6a,
|
|
.group_count = ARRAY_SIZE(icelake_pch_h_community_4_groups),
|
|
.groups = icelake_pch_h_community_4_groups,
|
|
};
|
|
|
|
static const struct gpio_group icelake_pch_h_group_r = {
|
|
.display = "------- GPIO Group R -------",
|
|
.pad_count = ARRAY_SIZE(icelake_pch_h_group_r_names) / 2,
|
|
.func_count = 2,
|
|
.pad_names = icelake_pch_h_group_r_names,
|
|
};
|
|
|
|
static const struct gpio_group icelake_pch_h_group_s = {
|
|
.display = "------- GPIO Group S -------",
|
|
.pad_count = ARRAY_SIZE(icelake_pch_h_group_s_names) / 2,
|
|
.func_count = 2,
|
|
.pad_names = icelake_pch_h_group_s_names,
|
|
};
|
|
|
|
static const struct gpio_group icelake_pch_h_group_spi = {
|
|
.display = "------- GPIO Group SPI -------",
|
|
.pad_count = ARRAY_SIZE(icelake_pch_h_group_spi_names) / 2,
|
|
.func_count = 2,
|
|
.pad_names = icelake_pch_h_group_spi_names,
|
|
};
|
|
|
|
static const struct gpio_group *const icelake_pch_h_community_5_groups[] = {
|
|
&icelake_pch_h_group_r,
|
|
&icelake_pch_h_group_s,
|
|
&icelake_pch_h_group_spi,
|
|
};
|
|
|
|
static const struct gpio_community icelake_pch_h_community_5 = {
|
|
.name = "------- GPIO Community 5 -------",
|
|
.pcr_port_id = 0x69,
|
|
.group_count = ARRAY_SIZE(icelake_pch_h_community_5_groups),
|
|
.groups = icelake_pch_h_community_5_groups,
|
|
};
|
|
|
|
static const struct gpio_community *const icelake_pch_h_communities[] = {
|
|
&icelake_pch_h_community_0,
|
|
&icelake_pch_h_community_1,
|
|
&icelake_pch_h_community_2,
|
|
&icelake_pch_h_community_3,
|
|
&icelake_pch_h_community_4,
|
|
&icelake_pch_h_community_5,
|
|
};
|
|
|
|
#endif
|