d63085b20e
Since we have CBFS setting rom_address in board files is no longer necessary. Also, drop vga_rom_address from RS690 completely, it was never used in the code. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
56 lines
1.3 KiB
Text
56 lines
1.3 KiB
Text
chip northbridge/intel/i82810
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device pci_domain 0 on
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device pci 0.0 on end # Host bridge
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device pci 1.0 on # Onboard Video
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#chip drivers/pci/onboard
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# device pci 1.0 on end
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#end
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end
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chip southbridge/intel/i82801xx # Southbridge
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register "ide0_enable" = "1"
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register "ide1_enable" = "1"
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device pci 1e.0 on # PCI Bridge
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#chip drivers/pci/onboard
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# device pci 1.0 on end
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#end
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end
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device pci 1f.0 on # ISA/LPC? Bridge
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chip superio/smsc/lpc47b272
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device pnp 2e.0 off # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 2e.3 off # Parallel Port
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io 0x60 = 0x378
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irq 0x70 = 7
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end
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device pnp 2e.4 on # Com1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.5 off # Com2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.7 on # Keyboard
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1 # Keyboard interrupt
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irq 0x72 = 12 # Mouse interrupt
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end
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device pnp 2e.a off end # ACPI
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end
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end
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device pci 1f.1 on end # IDE
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device pci 1f.2 on end # USB
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device pci 1f.3 on end # SMBus
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device pci 1f.5 off end # AC'97, no header on MEW-VM
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device pci 1f.6 off end # AC'97 Modem (MC'97)
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end
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end
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chip cpu/intel/socket_PGA370
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end
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end
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