d27c08c289
now handled more generically using CBFS. Simplify the option ROM code in device/pci_rom.c, since there are only two ways to get a ROM address now (CBFS and the device) and add an exception for qemu. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
152 lines
4 KiB
Text
152 lines
4 KiB
Text
chip northbridge/amd/amdk8/root_complex
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device apic_cluster 0 on
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chip cpu/amd/socket_940
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device apic 0 on end
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end
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end
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device pci_domain 0 on
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chip northbridge/amd/amdk8 #mc0
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device pci 18.0 on # northbridge
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# devices on link 0, link 0 == LDT 0
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chip southbridge/nvidia/ck804
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device pci 0.0 on end # HT
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device pci 1.0 on # LPC
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chip superio/winbond/w83627hf
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device pnp 2e.0 on # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 2e.1 on # Parallel Port
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io 0x60 = 0x378
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irq 0x70 = 7
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drq 0x74 = 3
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end
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device pnp 2e.2 on # Com1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.3 off # Com2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.5 on # Keyboard
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1
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irq 0x72 = 12
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end
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device pnp 2e.6 off # CIR
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io 0x60 = 0x100
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end
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device pnp 2e.7 off # GAME_MIDI_GIPO1
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io 0x60 = 0x220
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io 0x62 = 0x300
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irq 0x70 = 9
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end
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device pnp 2e.8 off end # GPIO2
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device pnp 2e.9 off end # GPIO3
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device pnp 2e.a off end # ACPI
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device pnp 2e.b on # HW Monitor
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io 0x60 = 0x290
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irq 0x70 = 5
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end
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end
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end
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device pci 1.1 on # SM 0
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chip drivers/generic/generic #dimm 0-0-0
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device i2c 50 on end
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end
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chip drivers/generic/generic #dimm 0-0-1
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device i2c 51 on end
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end
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chip drivers/generic/generic #dimm 0-1-0
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device i2c 52 on end
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end
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chip drivers/generic/generic #dimm 0-1-1
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device i2c 53 on end
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end
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chip drivers/generic/generic #dimm 1-0-0
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device i2c 54 on end
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end
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chip drivers/generic/generic #dimm 1-0-1
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device i2c 55 on end
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end
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chip drivers/generic/generic #dimm 1-1-0
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device i2c 56 on end
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end
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chip drivers/generic/generic #dimm 1-1-1
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device i2c 57 on end
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end
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end # SM
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device pci 1.1 on # SM 1
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chip drivers/i2c/adm1027 # ADT7463A CPU0 temp, SYS FAN 2/3/4
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device i2c 2d on end
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end
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chip drivers/i2c/adm1027 # ADT7463A CPU1 temp, CPU0/1 FAN , SYS FAN 1/5
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device i2c 2e on end
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end
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chip drivers/generic/generic # Winbond HWM 0x54 CPU0/1 VRM temp, SYSFAN 6/7, SB FAN
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device i2c 2a on end
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end
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chip drivers/generic/generic # Winbond HWM 0x92
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device i2c 49 on end
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end
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chip drivers/generic/generic # Winbond HWM 0x94
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device i2c 4a on end
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end
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end #SM
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device pci 2.0 on end # USB 1.1
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device pci 2.1 on end # USB 2
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device pci 4.0 off end # ACI
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device pci 4.1 off end # MCI
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device pci 6.0 on end # IDE
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device pci 7.0 on end # SATA 1
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device pci 8.0 on end # SATA 0
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device pci 9.0 on # PCI
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# chip drivers/ati/ragexl
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device pci 6.0 on end
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# end
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device pci 8.0 on end
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end
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device pci a.0 off end # NIC
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device pci b.0 off end # PCI E 3
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device pci c.0 off end # PCI E 2
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device pci d.0 on end # PCI E 1
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device pci e.0 on end # PCI E 0
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register "ide0_enable" = "1"
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register "ide1_enable" = "1"
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register "sata0_enable" = "1"
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register "sata1_enable" = "1"
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end
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end # device pci 18.0
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device pci 18.0 on end # Link 1
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device pci 18.0 on
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# devices on link 2, link 2 == LDT 2
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chip southbridge/amd/amd8131
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# the on/off keyword is mandatory
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device pci 0.0 on end
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device pci 0.1 on end
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device pci 1.0 on
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device pci 9.0 on end # broadcom 5704
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device pci 9.1 on end
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end
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device pci 1.1 on end
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end
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end # device pci 18.0
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.3 on end
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end #mc0
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end # pci_domain
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# chip drivers/generic/debug
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# device pnp 0.0 off end
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# device pnp 0.1 off end
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# device pnp 0.2 off end
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# device pnp 0.3 off end
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# device pnp 0.4 off end
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# device pnp 0.5 on end
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# end
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end # root_complex
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