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coreboot-kgpe-d16/src/mainboard/google/veyron_danger
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David Hendricks c55d839000 veyron_{brain,danger,mickey,romy}: Select PHYSICAL_REC_SWITCH 
BUG=chrome-os-partner:42220
BRANCH=veyron
TEST=Used physical recovery button to enter dev mode on mickey

Change-Id: I78332f516b042be9c0cef6d8a59af44b670fc260
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4fcd79a133dc750dffd5d23e0b84a109e7b7cb8d
Original-Change-Id: I8d8dc0c0b98bbd194095d47047c8c5199ce17769
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/283546
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/10844
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-09 00:10:05 +02:00
..
sdram_inf google/veyron_*: add ELPIDA F8132A3MA and FA232A2MA sdram 2015-04-22 08:43:32 +02:00
board.h veyron_danger: Update SDMMC power on/off code for v2 2015-06-30 08:09:13 +02:00
boardid.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
bootblock.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
chromeos.c veyron_danger: Enable developer mode switch 2015-07-09 00:08:59 +02:00
devicetree.cb veyron_*: Set vop_mode in devicetree.cb files 2015-07-06 09:40:23 +02:00
Kconfig veyron_{brain,danger,mickey,romy}: Select PHYSICAL_REC_SWITCH 2015-07-09 00:10:05 +02:00
Kconfig.name kconfig: automatically include mainboards 2015-04-18 08:31:08 +02:00
mainboard.c veyron_danger: EDP changes for v2 2015-07-06 09:39:25 +02:00
Makefile.inc google/veyron: Fix building with CHROMEOS enabled 2015-06-30 08:17:52 +02:00
memlayout.ld
reset.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
romstage.c rk3288: Use timestamp region for pre-cbmem timestamps 2015-07-07 20:07:13 +02:00
sdmmc.c veyron_danger: Update SDMMC power on/off code for v2 2015-06-30 08:09:13 +02:00
sdram_configs.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00