coreboot-kgpe-d16/src/mainboard/google/jecht
Jonathan A. Kollasch ec505ad21c azalia: fix up and clean up shrinkage of boilerplate code
Should fix regression in HDA verb setup on nvidia mcp55 and intel sch
southbridges.  The mcp55 code could not find the mainboard's verb table
because the table was not even being compiled in.  The sch boards appeared
to have the same issue.

Intel broadwell and fsp_bd82x6x seemed to have not gotten the boilerplate
shrink, so apply it to those too.

Followup-to: Ib3e09644c0ee71aacb067adaa85653d151b52078
             (azalia: Shrink boilerplate)

Change-Id: If7aae69f5171db67055ffe220bdff392caaa5d9f
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/10826
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-07-14 13:40:07 +02:00
..
acpi
spd
acpi_tables.c
chromeos.c google/jecht: Fix compiling GPIO table code 2015-06-30 21:33:05 +02:00
cmos.layout
devicetree.cb
dsdt.asl
fadt.c
gpio.h
hda_verb.c azalia: fix up and clean up shrinkage of boilerplate code 2015-07-14 13:40:07 +02:00
Kconfig Kconfig: Get rid of obsolete symbols 2015-06-24 06:03:42 +02:00
Kconfig.name
lan.c google/jecht: fix MAC address programming when VPD not present 2015-06-12 10:55:07 +02:00
mainboard.c azalia: fix up and clean up shrinkage of boilerplate code 2015-07-14 13:40:07 +02:00
Makefile.inc
onboard.h
pei_data.c
romstage.c
smihandler.c
thermal.h