5626d8f59a
The startup sequence for cpu0 is implemented while also providing a trampoline for transitioning to 64-bit mode because the denver cores on t132 come out of cold reset in 32-bit mode. Mainboard callbacks are provided for providing the board-specific bits of the bringup sequence. BUG=chrome-os-partner:29923 BRANCH=None TEST=Built and booted through ramstage. Original-Change-Id: I50755fb6b06db994af8667969d8493f214a70aae Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/207263 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Stefan Reinauer <reinauer@google.com> (cherry picked from commit 17f09bf4bdb43986c19067ca8fd65d4c5365a7c6) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I14d99c24dd6e29a4584c8c548c4b26c92b6ade97 Reviewed-on: http://review.coreboot.org/8586 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
57 lines
1.8 KiB
C
57 lines
1.8 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2013 Google Inc.
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* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <soc/addressmap.h>
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#include "pmc.h"
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#include "power.h"
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static struct tegra_pmc_regs * const pmc = (void *)TEGRA_PMC_BASE;
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static int partition_powered(int id)
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{
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return read32(&pmc->pwrgate_status) & (0x1 << id);
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}
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void power_ungate_partition(uint32_t id)
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{
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printk(BIOS_INFO, "Ungating power partition %d.\n", id);
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if (!partition_powered(id)) {
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uint32_t pwrgate_toggle = read32(&pmc->pwrgate_toggle);
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pwrgate_toggle &= ~(PMC_PWRGATE_TOGGLE_PARTID_MASK);
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pwrgate_toggle |= (id << PMC_PWRGATE_TOGGLE_PARTID_SHIFT);
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pwrgate_toggle |= PMC_PWRGATE_TOGGLE_START;
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write32(pwrgate_toggle, &pmc->pwrgate_toggle);
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/* Wait for the request to be accepted. */
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while (read32(&pmc->pwrgate_toggle) & PMC_PWRGATE_TOGGLE_START)
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;
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printk(BIOS_DEBUG, "Power gate toggle request accepted.\n");
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/* Wait for the partition to be powered. */
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while (!partition_powered(id))
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;
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}
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printk(BIOS_INFO, "Ungated power partition %d.\n", id);
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}
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