Liu Tao 676d0298a1 In the RS780/RS690 ProgK8TempMmioBase() function, the dst-link field is set ... to zero, so for boards with RS780 not on CPU's HT chain 0, the function will mis-configure the MMIO dst-link routing, and the following enable_pcie_bar3() function will hang when it visits the MMIO. The following patch fixes the problem, and is tested on a K8 board with RS780 on HT chain 1. Signed-off-by: Liu Tao <liutao1980@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5959 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2010-10-17 21:59:43 +00:00
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chip.h	Make SB600/SB700 more similar for easier diffs (trivial).	2010-09-24 23:37:25 +00:00
Kconfig	Features supported in RS780 code:	2010-03-16 01:41:14 +00:00
Makefile.inc	Rename build system variables to be more intuitive, and	2010-09-30 16:55:02 +00:00
rs780.c	Remove the building warnings.	2010-03-23 06:46:01 +00:00
rs780.h	Features supported in RS780 code:	2010-03-16 01:41:14 +00:00
rs780_cmn.c	In the RS780/RS690 ProgK8TempMmioBase() function, the dst-link field is set	2010-10-17 21:59:43 +00:00
rs780_early_setup.c	no warnings day	2010-04-07 15:32:52 +00:00
rs780_gfx.c	We currently read the CPU HT speed from HT chain 0's register.	2010-10-17 21:34:45 +00:00
rs780_ht.c	printk_foo -> printk(BIOS_FOO, ...)	2010-03-22 11:42:32 +00:00
rs780_pcie.c	Remove the building warnings.	2010-03-23 06:46:01 +00:00
rs780_rev.h	Features supported in RS780 code:	2010-03-16 01:41:14 +00:00