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Andrey Korolyov d83b0e9ac4 mainboard/amd: add support for F2950 system board
F2950 SBC, also known as TONK 1201/TONK 1202, was originally
produced as a Centerm F2950 using DB800 reference design. Common
configuration does include a 600 MHz GeodeLX CPU underclocked to
500 or 400 MHz, 128 or 512 MiB of RAM in the single SODIMM slot and
128 or 512 MB IDE DOM. The board does have three USB 2.0 ports
(none of them possessing debug capabilities), PS/2, VGA, Geode
audio in/out and the serial port.

EEPROM needs to be soldered out and flashed externally at the time
of this message because flashrom would neither be able to dump BIOS
correctly while running vendor BIOS nor write flash contents.

All peripherals were tested against Linux 3.16 and seem to work
flawlessly. At the moment of this commit coreboot does not pass
PCI_COMMAND_IO from the configuration space to SeaBIOS, thereby
preventing VGA OPROM from being executed. This would be fixed in
the SeaBIOS itself or in a subsequent commit. As a workaround,
user may put VGA OPROM to vgaroms/seavgabios.bin in CBFS.

Signed-off-by: Andrey Korolyov <andrey@xdel.ru>

Change-Id: I93f13ecb53bd05abc0e07e0bd7ba40e646dcb4c4
Reviewed-on: https://review.coreboot.org/15565
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-07-17 16:50:35 +02:00
3rdparty 3rdparty/arm-trusted-firmware: Update to Jun 8, 2016 master 2016-06-12 12:14:06 +02:00
Documentation Documentation: Fix doxygen errors 2016-07-12 22:41:02 +02:00
payloads payloads/iPXE: Fix PXE Kconfig question 2016-07-12 19:24:03 +02:00
src mainboard/amd: add support for F2950 system board 2016-07-17 16:50:35 +02:00
util buildgcc: Update the revision to 1.41 2016-07-16 00:03:30 +02:00
.clang-format
.gitignore .gitignore: add build and libpayload dirs for nvramcui payload 2016-05-03 04:16:45 +02:00
.gitmodules git modules: rename git submodules to avoid hierarchies 2016-02-11 20:55:55 +01:00
.gitreview
COPYING
MAINTAINERS MAINTAINERS: Add myself as tpm support maintainer. 2016-07-07 17:04:29 +02:00
Makefile Makefile: Include config from DOTCONFIG instead of HAVE_DOTCONFIG 2016-07-15 00:06:09 +02:00
Makefile.inc flashmap: Use CONFIG_ROM_SIZE as flash size in flashmap 2016-06-21 17:51:54 +02:00
README
toolchain.inc toolchain.inc: test IASL by version string instead of number 2016-03-04 16:36:25 +01:00

README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See http://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * http://www.coreboot.org/Supported_Motherboards
 * http://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * make
 * gcc / g++
   Because Linux distribution compilers tend to use lots of patches. coreboot
   does lots of "unusual" things in its build system, some of which break due
   to those patches, sometimes by gcc aborting, sometimes - and that's worse -
   by generating broken object code.
   Two options: use our toolchain (eg. make crosstools-i386) or enable the
   ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this
   case).
 * iasl (for targets with ACPI support)

Optional:

 * doxygen (for generating/viewing documentation)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig' and 'make nconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult http://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see http://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  http://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  http://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.