d8a789f6df
not brought over to Kconfig (this applies to all #defines to 4, as that's the default anyway) Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6104 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
199 lines
2.6 KiB
Text
199 lines
2.6 KiB
Text
if BOARD_MSI_MS9652_FAM10
|
|
|
|
config BOARD_SPECIFIC_OPTIONS # dummy
|
|
def_bool y
|
|
select ARCH_X86
|
|
select CPU_AMD_SOCKET_F_1207
|
|
select DIMM_DDR2
|
|
select DIMM_REGISTERED
|
|
select NORTHBRIDGE_AMD_AMDFAM10
|
|
select SOUTHBRIDGE_NVIDIA_MCP55
|
|
select MCP55_USE_NIC
|
|
select MCP55_USE_AZA
|
|
select SUPERIO_WINBOND_W83627EHG
|
|
select HAVE_BUS_CONFIG
|
|
select HAVE_PIRQ_TABLE
|
|
select HAVE_MP_TABLE
|
|
select HAVE_ACPI_TABLES
|
|
select CACHE_AS_RAM
|
|
select HAVE_OPTION_TABLE
|
|
select HAVE_HARD_RESET
|
|
select BOARD_ROMSIZE_KB_512
|
|
select RAMINIT_SYSINFO
|
|
select ENABLE_APIC_EXT_ID
|
|
select AMDMCT
|
|
select TINY_BOOTBLOCK
|
|
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
|
select QRANK_DIMM_SUPPORT
|
|
|
|
config MAINBOARD_DIR
|
|
string
|
|
default msi/ms9652_fam10
|
|
|
|
config DCACHE_RAM_BASE
|
|
hex
|
|
default 0xc4000
|
|
|
|
config DCACHE_RAM_SIZE
|
|
hex
|
|
default 0x0c000
|
|
|
|
config DCACHE_RAM_GLOBAL_VAR_SIZE
|
|
hex
|
|
default 0x04000
|
|
|
|
config GENERATE_PIRQ_TABLE
|
|
bool
|
|
default y
|
|
|
|
# Define to 0 because the IRQ slot count is
|
|
# determined dynamically for this board.
|
|
config IRQ_SLOT_COUNT
|
|
int
|
|
default 0
|
|
|
|
config MAX_CPUS
|
|
int
|
|
default 8
|
|
|
|
config MAX_PHYSICAL_CPUS
|
|
int
|
|
default 2
|
|
|
|
config LOGICAL_CPUS
|
|
bool
|
|
default y
|
|
|
|
config IOAPIC
|
|
bool
|
|
default y
|
|
|
|
config SMP
|
|
bool
|
|
default y
|
|
|
|
config STACK_SIZE
|
|
hex
|
|
default 0x20000
|
|
|
|
config HEAP_SIZE
|
|
hex
|
|
default 0x20000
|
|
|
|
config USE_OPTION_TABLE
|
|
bool
|
|
default n
|
|
|
|
config MAINBOARD_PART_NUMBER
|
|
string
|
|
default "MS-9652"
|
|
|
|
config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
|
hex
|
|
default 0x1462
|
|
|
|
config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
|
hex
|
|
default 0x9652
|
|
|
|
config RAMBASE
|
|
hex
|
|
default 0x00200000
|
|
|
|
config TTYS0_BAUD
|
|
int
|
|
default 115200
|
|
|
|
config TTYS0_BASE
|
|
hex
|
|
default 0x3f8
|
|
|
|
config TTYS0_LCS
|
|
int
|
|
default 3
|
|
|
|
config DEFAULT_CONSOLE_LOGLEVEL
|
|
int
|
|
default 9
|
|
|
|
config MAXIMUM_CONSOLE_LOGLEVEL
|
|
int
|
|
default 9
|
|
|
|
config MAINBOARD_POWER_ON_AFTER_POWER_FAIL
|
|
bool
|
|
default y
|
|
|
|
config CONSOLE_SERIAL8250
|
|
bool
|
|
default y
|
|
|
|
config CONSOLE_VGA
|
|
bool
|
|
default y
|
|
|
|
config PCI_ROM_RUN
|
|
bool
|
|
default y
|
|
|
|
config USBDEBUG
|
|
bool
|
|
default n
|
|
|
|
config HT_CHAIN_UNITID_BASE
|
|
hex
|
|
default 0x20
|
|
|
|
config HT_CHAIN_END_UNITID_BASE
|
|
hex
|
|
default 0x00
|
|
|
|
config SB_HT_CHAIN_ON_BUS0
|
|
int
|
|
default 1
|
|
|
|
config VAR_MTRR_HOLE
|
|
bool
|
|
default n
|
|
|
|
config SERIAL_CPU_INIT
|
|
bool
|
|
default y
|
|
|
|
config APIC_ID_OFFSET
|
|
hex
|
|
default 0x00
|
|
|
|
config LIFT_BSP_APIC_ID
|
|
bool
|
|
default 1
|
|
|
|
config RAMTOP
|
|
hex
|
|
default 0x1000000
|
|
|
|
config MEM_TRAIN_SEQ
|
|
int
|
|
default 2
|
|
|
|
config WAIT_BEFORE_CPUS_INIT
|
|
bool
|
|
default n
|
|
|
|
config AMD_UCODE_PATCH_FILE
|
|
string
|
|
default "mc_patch_01000096.h"
|
|
|
|
config ID_SECTION_OFFSET
|
|
hex
|
|
default 0x80
|
|
|
|
config HT3_SUPPORT
|
|
bool
|
|
default y
|
|
|
|
config MCP55_PCI_E_X_0
|
|
int
|
|
default 1
|
|
|
|
endif # BOARD_MSI_MS9652_FAM10
|