coreboot-kgpe-d16/src/mainboard/supermicro/h8dmr_fam10
Patrick Georgi d8a789f6df Move MCP55_PCI_E_X_* to Kconfig. Any useless values in romstage.cs were
not brought over to Kconfig (this applies to all #defines to 4, as
that's the default anyway)

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6104 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-21 14:38:24 +00:00
..
chip.h Remove unused mainboard_config definitions. Trivial. 2010-08-26 18:24:04 +00:00
cmos.layout Since some people disapprove of white space cleanups mixed in regular commits 2010-04-27 06:56:47 +00:00
devicetree.cb CK804/MCP55 devicetree.cb cosmetic and indentation fixes. 2010-11-14 20:10:11 +00:00
get_bus_conf.c dualcore.h and quadcore.h are almost exactly the same. 2010-03-29 14:45:36 +00:00
hda_verb.h My old mcp55 azalia fix from May 2010. Was never checked in. 2010-08-14 17:45:54 +00:00
irq_tables.c Since some people disapprove of white space cleanups mixed in regular commits 2010-04-27 06:56:47 +00:00
Kconfig Move QRANK_DIMM_SUPPORT to Kconfig, removing it from romstage.c 2010-11-05 22:59:49 +00:00
mainboard.c My old mcp55 azalia fix from May 2010. Was never checked in. 2010-08-14 17:45:54 +00:00
mb_sysconf.h Since some people disapprove of white space cleanups mixed in regular commits 2010-04-27 06:56:47 +00:00
mptable.c We need to call smp_write_lintsrc() instead of smp_write_intsrc() for 2010-10-26 22:40:16 +00:00
README Fix/drop some obsolete comments, 2010-11-18 20:12:13 +00:00
resourcemap.c Since some people disapprove of white space cleanups mixed in regular commits 2010-04-27 06:56:47 +00:00
romstage.c Move MCP55_PCI_E_X_* to Kconfig. Any useless values in romstage.cs were 2010-11-21 14:38:24 +00:00


There are a number of outstanding issues:

* I'm seeing toolchain issues. I can't get this tree to compile correctly with
gcc 4.3 (32 bit) - there is an optimization issue where certain parts of the
CBFS code execute very slowly. With gcc 3.4 (32 bit) that slowness
disappears. This is probably not a problem related to this port specifically.

* setting CONFIG_DEFAULT_CONSOLE_LOGLEVEL lower than 8 simply hangs the boot
shortly after the warm reset triggered by the MCP55 code. I think this too
might be a toolchain problem (but I see it on gcc 3.4 as well as 4.3).

* during startup, the CPU cores talk through each other on serial for a
while. Again, not an issue specific to this port.

* to avoid very slow LZMA decompression I use this port with LZMA compression
disabled in CBFS. I'm not sure what's causing this particular slowness.

See also this thread: http://www.coreboot.org/pipermail/coreboot/2009-September/052107.html

Ward, 2009-09-22

mansoor@iwavesystems.com said, about the last issue:

  Try enabling CONFIG_XIP_ROM_BASE.  It solved the same problem for me in my board.

So, that's a todo.