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Furquan Shaikh d942c23203 soc/amd/common/gpio: Update the macros for interrupt and pad filtering 
This change renames GPIO macros as follows:
1. Pad filtering macros are renamed to GPIO_TRIGGER_ and
GPIO_ACTIVE_. This determines the filtering applied on the input
signal at the pad.
2. Interrupt enabling macros are renamed to GPIO_INT_ENABLE_.

_INT_ is dropped from pad filtering macros because the filtering
applies to the input signal irrespective of how it is routed. It is
applied at the pad not only for GPIO interrupts but also for other
routes i.e. SCI, SMI, etc.

BUG=b:159944426

Change-Id: Id0ad770be77409aaaae4cc135945e2815ce97030
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42870
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 		2020-06-30 22:35:47 +00:00
3rdparty Add qc_blobs repository 2020-06-30 08:57:03 +00:00
Documentation Doc/mb/google/dragonegg: Drop abandoned project info 2020-06-30 09:19:52 +00:00
LICENSES drivers: Use SPDX identifiers 2020-05-25 22:19:21 +00:00
configs mb/ocp/deltalake: Add OCP Delta Lake mainboard 2020-06-22 12:21:18 +00:00
payloads libpayload/cbgfx: Fix overflow in transform_vector() 2020-06-28 21:52:18 +00:00
src soc/amd/common/gpio: Update the macros for interrupt and pad filtering 2020-06-30 22:35:47 +00:00
tests tests: Add some basic warnings and fix resulting issues 2020-06-12 19:40:19 +00:00
util ACPI: Drop typedef global_nvs_t 2020-06-30 09:19:10 +00:00
.checkpatch.conf
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.clang-format lint/clang-format: set to 96 chars per line 2019-06-13 20:14:00 +00:00
.editorconfig Add .editorconfig file 2019-09-10 12:52:18 +00:00
.gitignore cbfstool: Build vboot library 2020-03-23 08:34:23 +00:00
.gitmodules Add qc_blobs repository 2020-06-30 08:57:03 +00:00
.gitreview
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AUTHORS AUTHORS, util/: Drop individual copyright notices 2020-05-09 21:21:32 +00:00
COPYING update license template. 2006-08-12 22:03:36 +00:00
MAINTAINERS MAINTAINERS: Organize contents 2020-06-18 08:09:37 +00:00
Makefile crossgcc: Remove "Make" 2020-06-17 11:20:30 +00:00
Makefile.inc Add qc_blobs repository 2020-06-30 08:57:03 +00:00
README.md README.md: Remove link to deprecated wiki 2019-11-16 20:39:55 +00:00
gnat.adc treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
toolchain.inc Remove MAYBE_STATIC_BSS and ENV_STAGE_HAS_BSS_SECTION 2020-05-26 15:04:08 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.