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Robert Zieba 65fe21f1c9 util/apcb/apcb_v3_edit: Add support for LP5X SDRAM 
This commit adds support for LP5X SDRAM.

BUG=b:242765117
TEST=Ran with LP5X SPDs and manually patched APCB

Signed-off-by: Robert Zieba <robertzieba@google.com>
Change-Id: I2d3cb9c9a1523cb4c5149ede1c96a16c3991a5d0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66840
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
 		2022-08-25 00:49:52 +00:00
..
README util/apcb: Add apcb_edit tool 2020-05-18 07:40:47 +00:00
apcb_edit.py util/apcb_edit: fix handling of binary SPD files 2020-09-08 05:44:28 +00:00
apcb_v3_edit.py util/apcb/apcb_v3_edit: Add support for LP5X SDRAM 2022-08-25 00:49:52 +00:00
description.md
…

README 

The necessary tools for building APCBs are not available for use by coreboot.
This tool allows patching an existing APCB binary with specific SPDs
and GPIO selection pins.