coreboot-kgpe-d16/src/northbridge/amd
Marc Jones b5623d18cc This patch for the AMD K8 allows a single DIMM to be populated in the
ChannelB slot. Previously a DIMM could only be populated in ChannelB
if there was a DIMM already in ChannelA. This patch doesn't allow unmatched
DIMMs to be populate in ChannelA and ChannelB. In an A & B configuration
the DIMM must still be matched.

Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3614 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-29 18:09:51 +00:00
..
amdfam10 Add early MSR and PCI register initialization. 2008-04-22 22:11:31 +00:00
amdht Missed a const in my previous checkin, r3426 (trivial). 2008-07-21 22:23:57 +00:00
amdk8 This patch for the AMD K8 allows a single DIMM to be populated in the 2008-09-29 18:09:51 +00:00
amdmct Memory initialization support for AMD Fam10 B3 (B0-B2 already supported). 2008-07-23 21:04:03 +00:00
gx1 Ever wondered where those "setting incorrect section attributes for 2007-10-24 09:08:58 +00:00
gx2 Rename almost all occurences of LinuxBIOS to coreboot. 2008-01-18 15:08:58 +00:00
lx Factor out print_conf() from Geode LX mainboard directories. The 2008-02-05 09:21:46 +00:00