Andrey Petrov dc97b1ce2f soc/intel/apollolake: Fix bitshift issue in bootblock ... Fix issue where zero-sized BIOS region could cause bitshift for '-1' which is an unspecified behavior. Change-Id: Icb62bf413a1a0d293657503ef21fe97b5f9a5484 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/15727 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-07-19 18:57:13 +02:00
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acpi	arch/x86: provide common Intel ACPI hardware definitions	2016-07-15 08:31:21 +02:00
arch	arch/riscv: Remove enter_supervisor	2016-07-18 22:51:13 +02:00
commonlib	region: Add writeat and eraseat support	2016-06-24 20:48:12 +02:00
console	console/post: be explicit about conditional cmos_post_log() compiling	2016-05-25 18:04:11 +02:00
cpu	AMD binaryPI: Use common romstage ram stack	2016-07-15 12:31:07 +02:00
device	device: i2c: Add support for I2C bus operations	2016-06-09 17:05:40 +02:00
drivers	elog: Use rdev_mmap to find offset of ELOG	2016-07-18 08:12:12 +02:00
ec	ec/google/chromeec: provide common SMI handler helpers	2016-07-15 08:35:29 +02:00
include	lib: add poweroff() declaration	2016-07-15 08:35:15 +02:00
lib	AGESA: Use common romstage ram stack	2016-07-15 12:18:54 +02:00
mainboard	google/oak & elm: initialize touchscreen reset gpio	2016-07-18 20:14:29 +02:00
northbridge	nb/intel/x4x: Fix CAS latency detection	2016-07-19 18:55:50 +02:00
soc	soc/intel/apollolake: Fix bitshift issue in bootblock	2016-07-19 18:57:13 +02:00
southbridge	southbridge/intel/fsp_bd82x6x: use common Intel ACPI hardware definitions	2016-07-15 08:34:46 +02:00
superio	sio/winbond/w83667hg-a: Add pinmux defines for UART B	2016-05-29 19:34:54 +02:00
vendorcode	chromeos: Fill in the firmware id (RO, RW A, RW B) FMAP sections	2016-07-15 00:40:19 +02:00
Kconfig	Romstage spinlocks require EARLY_CBMEM_INIT	2016-07-10 04:03:31 +02:00