6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
69 lines
2.8 KiB
C
69 lines
2.8 KiB
C
/*
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*
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* Copyright 2018 Google LLC
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef __DRIVERS_I8042_I8042_H__
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#define __DRIVERS_I8042_I8042_H__
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/* Port 0x64 commands */
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#define I8042_CMD_RD_CMD_BYTE 0x20
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#define I8042_CMD_WR_CMD_BYTE 0x60
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#define I8042_CMD_BYTE_XLATE (1 << 6)
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#define I8042_CMD_DIS_AUX 0xa7
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#define I8042_CMD_EN_AUX 0xa8
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#define I8042_CMD_AUX_TEST 0xa9
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#define I8042_CMD_SELF_TEST 0xaa
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#define I8042_SELF_TEST_RSP 0x55
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#define I8042_CMD_KB_TEST 0xab
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#define I8042_CMD_DIAG_DUMP 0xac
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#define I8042_CMD_DIS_KB 0xad
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#define I8042_CMD_EN_KB 0xae
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#define I8042_CMD_RD_INPUT_PORT 0xc0
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#define I8042_CMD_RD_OUTPUT_PORT 0xd0
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#define I8042_CMD_WR_OUTPUT_PORT 0xd1
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#define I8042_CMD_RD_TEST_INPUTS 0xe0
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/* Port 0x60 keyboard commands */
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#define I8042_KBCMD_SET_MODE_IND 0xed
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#define I8042_MODE_CAPS_LOCK_ON (1 << 2)
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#define I8042_MODE_CAPS_LOCK_OFF (0 << 2)
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#define I8042_MODE_NUM_LOCK_ON (1 << 1)
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#define I8042_MODE_NUM_LOCK_OFF (0 << 1)
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#define I8042_MODE_SCROLL_LOCK_ON (1 << 0)
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#define I8042_MODE_SCROLL_LOCK_OFF (0 << 0)
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#define I8042_KBCMD_SET_SCANCODE 0xf0
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#define I8042_SCANCODE_SET_1 (1)
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#define I8042_SCANCODE_SET_2 (2)
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#define I8042_SCANCODE_SET_3 (3)
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#define I8042_KBCMD_SET_TYPEMATIC 0xf3
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#define I8042_KBCMD_EN 0xf4
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#define I8042_KBCMD_DEFAULT_DIS 0xf5
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#define I8042_KBCMD_SET_DEFAULT 0xf6
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#define I8042_KBCMD_RESEND 0xfe
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#define I8042_KBCMD_RESET 0xff
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#endif /* __DRIVERS_I8042_I8042_H__ */
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