20 lines
355 B
C
20 lines
355 B
C
#ifndef CPU_INTEL_MSR_H
|
|
#define CPU_INTEL_MSR_H
|
|
|
|
/*
|
|
* Common MSRs for Intel CPUs
|
|
*/
|
|
|
|
#define MSR_FEATURE_CONFIG 0x13c
|
|
#define AESNI_DISABLE (1 << 1)
|
|
#define AESNI_LOCK (1 << 0)
|
|
|
|
#define MSR_PIC_MSG_CONTROL 0x2e
|
|
#define TPR_UPDATES_DISABLE (1 << 10)
|
|
|
|
#define MSR_PLATFORM_INFO 0xce
|
|
|
|
#define MSR_PKG_C10_RESIDENCY 0x632
|
|
|
|
#endif /* CPU_INTEL_MSR_H */
|