coreboot-kgpe-d16/src
Martin Roth debd765754 Add the ivybridge i89xx FSP include & srx directories
These are the .h and .c files from Intel that support interaction
with the FSP.  These have been modified from the FSP distribution
only to strip trailing whitespace.

Intel® Firmware Support Package for Intel® Xeon® E3-1125C v2,
E3-1105C v2, Intel® Pentium® Processor B925C, and Intel® Core™
i3-3115C Processors for Communications Infrastructure with
Intel® Communications Chipset 89xx Series Platform Controller Hub
(formerly Crystal Forest Refresh: Ivy Bridge Gladden and Cave Creek

"Intel® Firmware Support Package (Intel® FSP) provides key
programming information for initializing Intel® silicon and can be
easily integrated into a boot loader of the developer’s choice.
It is easy to adopt, scalable to design, reduces time-to-market, and
is economical to build."

http://www.intel.com/fsp

Change-Id: Ib76e89b2d2f6407cf55a5a664da989c7a7e0eb23
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/5455
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-04-11 17:27:32 +02:00
..
arch console: Refactor uart8250/NE2K 2014-04-09 13:28:33 +02:00
console console: Remove old fix for DEBUG_SMI 2014-04-09 13:26:48 +02:00
cpu console: Move newline translation outside console_tx_byte 2014-04-09 13:21:25 +02:00
device OxPCIe uart: Split PCI bridge control 2014-04-09 11:29:45 +02:00
drivers OxPCIe uart: Move under drivers/uart 2014-04-09 11:30:53 +02:00
ec ec/compal/ene932/ec.h: Include stdint.h for definition of 'u8' 2014-04-09 05:38:11 +02:00
include console: Refactor uart8250/NE2K 2014-04-09 13:28:33 +02:00
lib uart: Redefine Kconfig options 2014-04-09 11:24:43 +02:00
mainboard supermicro/h8qgi/dsdt: Use PIC as default interrupt model 2014-04-09 20:52:12 +02:00
northbridge console: Move newline translation outside console_tx_byte 2014-04-09 13:21:25 +02:00
soc console: Move newline translation outside console_tx_byte 2014-04-09 13:21:25 +02:00
southbridge intel/*bd82x6x/acpi/pch.asl: Correct name of field unit to GP03 2014-04-11 15:21:03 +02:00
superio uart: Redefine Kconfig options 2014-04-09 11:24:43 +02:00
vendorcode Add the ivybridge i89xx FSP include & srx directories 2014-04-11 17:27:32 +02:00
Kconfig SeaBIOS: have coreboot pass the choice to run optionroms in parallel 2014-04-07 11:54:26 +02:00