coreboot-kgpe-d16/src
Keith Hui edd38465a5 mainboard/asus/p3b-f: Reintroduce as variant of p2b
Fold this last ASUS 440BX board into the P2B family, while bringing in
some changes:

- Devicetree becomes overridetree.
- Remove non-existent IR device and disable ACPI device on Super I/O to
  match OEM firmware.
- Add SB GPO settings from OEM firmware to devicetree. This disables
  the SPD enabling magic this board needs. By moving the enabling part
  to bootblock the hacky enable_spd hook can be eliminated.
- Initialize the serial port in bootblock, like the other boards.

Boot tested on hardware.

Change-Id: I65f2cb9d1bd4c82550de43889e3502526a46bd18
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41047
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-11 09:33:23 +00:00
..
acpi acpi: Update sata files to be more aligned with rest of acpi files 2020-05-02 20:41:39 +00:00
arch arch/x86: unexpose postcar_frame_common_mtrrs() 2020-05-07 23:34:13 +00:00
commonlib src/: Replace GPL boilerplate with SPDX headers 2020-05-09 21:22:25 +00:00
console src: Replace remaining GPLv2 long form headers with SPDX header 2020-05-10 13:12:20 +00:00
cpu src/cpu: Replace GPLv2 long form headers with SPDX header 2020-05-10 13:12:15 +00:00
device src/: Replace GPL boilerplate with SPDX headers 2020-05-09 21:22:25 +00:00
drivers src: Replace remaining GPLv2 long form headers with SPDX header 2020-05-10 13:12:20 +00:00
ec src/: Replace GPL boilerplate with SPDX headers 2020-05-09 21:22:25 +00:00
include memrange: Update comment to indicate limit is inclusive for memranges_next_entry 2020-05-08 15:29:03 +00:00
lib src: Replace remaining GPLv2 long form headers with SPDX header 2020-05-10 13:12:20 +00:00
mainboard mainboard/asus/p3b-f: Reintroduce as variant of p2b 2020-05-11 09:33:23 +00:00
northbridge src/: Replace GPL boilerplate with SPDX headers 2020-05-09 21:22:25 +00:00
security src/: Replace GPL boilerplate with SPDX headers 2020-05-09 21:22:25 +00:00
soc soc/intel/skylake: Allow setting of PcieRpMaxPayload 2020-05-11 09:30:04 +00:00
southbridge src: Replace remaining GPLv2 long form headers with SPDX header 2020-05-10 13:12:20 +00:00
superio superio/winbond/w83977tf: Only list IR logical device if needed 2020-05-11 09:28:35 +00:00
vendorcode src/: Replace GPL boilerplate with SPDX headers 2020-05-09 21:22:25 +00:00
Kconfig src/: Replace GPL boilerplate with SPDX headers 2020-05-09 21:22:25 +00:00